Yu Huang

Orcid: 0000-0002-3927-1102

Affiliations:
  • Huazhong University of Science and Technology, School of Computer Science and Technology, Wuhan, China


According to our database1, Yu Huang authored at least 29 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
ARCHER: a ReRAM-based accelerator for compressed recommendation systems.
Frontiers Comput. Sci., October, 2024

2023
Accelerating Graph Convolutional Networks Through a PIM-Accelerated Approach.
IEEE Trans. Computers, September, 2023

Accelerating Personalized Recommendation with Cross-level Near-Memory Processing.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

MetaNMP: Leveraging Cartesian-Like Product to Accelerate HGNNs with Near-Memory Processing.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

GraphMetaP: Efficient MetaPath Generation for Dynamic Heterogeneous Graph Models.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2023

AFaVS: Accurate Yet Fast Version Switching for Graph Processing Systems.
Proceedings of the 39th IEEE International Conference on Data Engineering, 2023

FNNG: A High-Performance FPGA-based Accelerator for K-Nearest Neighbor Graph Construction.
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

MeG<sup>2</sup>: In-Memory Acceleration for Genome Graphs Analysis.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
A Flexible Yet Efficient DNN Pruning Approach for Crossbar-Based Processing-in-Memory Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

ReaDy: A ReRAM-Based Processing-in-Memory Accelerator for Dynamic Graph Convolutional Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

ReCSA: a dedicated sort accelerator using ReRAM-based content addressable memory.
Frontiers Comput. Sci., 2022

CPSAA: Accelerating Sparse Attention using Crossbar-based Processing-In-Memory Architecture.
CoRR, 2022

GraphFly: Efficient Asynchronous Streaming Graphs Processing via Dependency-Flow.
Proceedings of the SC22: International Conference for High Performance Computing, 2022

A Data-Centric Accelerator for High-Performance Hypergraph Processing.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

A General Offloading Approach for Near-DRAM Processing-In-Memory Architectures.
Proceedings of the 2022 IEEE International Parallel and Distributed Processing Symposium, 2022

Accelerating Sparse Deep Neural Network Inference Using GPU Tensor Cores.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

ScalaGraph: A Scalable Accelerator for Massively Parallel Graph Processing.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

Hardware-Accelerated Hypergraph Processing with Chain-Driven Scheduling.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

Accelerating Graph Convolutional Networks Using Crossbar-based Processing-In-Memory Architectures.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

ReSMA: accelerating approximate string matching using ReRAM-based content addressable memory.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Fast Sparse Deep Neural Network Inference with Flexible SpMM Optimization Space Exploration.
Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021

GraSU: A Fast Graph Update Library for FPGA-based Dynamic Graph Processing.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

2020
Scaph: Scalable GPU-Accelerated Graph Processing with Value-Driven Differential Scheduling.
Proceedings of the 2020 USENIX Annual Technical Conference, 2020

A Locality-Aware Energy-Efficient Accelerator for Graph Mining Applications.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

A Heterogeneous PIM Hardware-Software Co-Design for Energy-Efficient Graph Processing.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020

Spara: An Energy-Efficient ReRAM-Based Accelerator for Sparse Graph Analytics Applications.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020

2019
Efficient Time-Evolving Stream Processing at Scale.
IEEE Trans. Parallel Distributed Syst., 2019

RAGra: Leveraging Monolithic 3D ReRAM for Massively-Parallel Graph Processing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Efficient Time-Evolving Stream Processing at Scale.
CoRR, 2018


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