A 4.2 nW and 18 ppm/°C Temperature Coefficient Leakage-Based Square Root Compensation (LSRC) CMOS Voltage Reference. - Chao-Jen Huang; Yan-Jiun Lai; Yu-Jheng Ou Yang; Hung-Wei Chen; Chun-Chieh Kuo; Ke-Horng Chen; Ying-Hsi Lin; Shian-Ru Lin; Tsung-Yen Tsai (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

17.7 A 0.03mV/mA Low Crosstalk and 185nA Ultra-Low-Quiescent Single-Inductor Multiple-Output Converter Assisted by 5-Input Operational Amplifier for 94.3% Peak Efficiency and 3.0W Driving Capability. - Tzu-Hsien Yang; Yong-Hwa Wen; Yu-Jheng Ou Yang; Chun-Kai Chiu; Bo-Kuan Wu; Ke-Horng Chen; Ying-Hsi Lin; Shian-Ru Lin; Tsung-Yen Tsai (ISSCC, 2021)

A 94.3% Peak Efficiency Adaptive Switchable CCM and DCM Single-Inductor Multiple-Output Converter With 0.03 mV/mA Low Crosstalk and 185 nA Ultralow Quiescent. - Tzu-Hsien Yang; Yong-Hwa Wen; Yu-Jheng Ouyang; Chun-Kai Chiu; Bo-Kuan Wu; Ke-Horng Chen; Ying-Hsi Lin; Shian-Ru Lin; Tsung-Yen Tsai (IEEE J. Solid State Circuits, 2022)