Loop-Tiling Based Compiling Optimization for CNN Accelerators. - Meiling Yang; Shan Cao; Wei Zhang 001; Yu Li 051; Zhiyuan Jiang (ASICON, 2023)

Hybrid-Grained Pruning and Hardware Acceleration for Convolutional Neural Networks. - Yu Li 051; Shan Cao; Beining Zhao; Wei Zhang 001; Zhiyuan Jiang (ISCAS, 2024)

MPQA: Mixed-Precision Quantization Accelerator for CNN Inference. - Beining Zhao; Yu Li 051; Jiahao Zuo; Wei Zhang 001; Xinyu Chen; Shan Cao; Zhiyuan Jiang (ISCAS, 2025)

A Heterogeneous CNN Compilation Framework for RISC-V CPU and NPU Integration Based on ONNX-MLIR. - Shan Cao; Meiling Yang; Yintao Liu; Yu Li 051; Beining Zhao; Xinyu Chen; Zhiyuan Jiang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

Efficient network compression via gradient-score aware pruning. - Qiuying Li; Zhixiang Chen 003; Yu Li 051; Zhiyuan Jiang; Shan Cao (Neurocomputing, 2026)