An 11b pipeline ADC with dual sampling technique for converting multi-carrier signals. - Yu Lin 003; Kostas Doris; Hans Hegt; Arthur H. M. van Roermund (ISCAS, 2011)

A dynamic latched comparator for low supply voltages down to 0.45 V in 65-nm CMOS. - Yu Lin 003; Kostas Doris; Hans Hegt; Arthur H. M. van Roermund (ISCAS, 2012)

An 11b Pipeline ADC With Parallel-Sampling Technique for Converting Multi-Carrier Signals. - Yu Lin 003; Kostas Doris; Hans Hegt; Arthur H. M. van Roermund (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

An 11b 1GS/s ADC with parallel sampling architecture to enhance SNDR for multi-carrier signals. - Yu Lin 003; Kostas Doris; Erwin Janssen; Athon Zanikopoulos; Alessandro Murroni; Gerard van der Weide; Hans Hegt; Arthur H. M. van Roermund (ESSCIRC, 2013)

An 11b 3.6GS/s time-interleaved SAR ADC in 65nm CMOS. - Erwin Janssen; Kostas Doris; Athon Zanikopoulos; Alessandro Murroni; Gerard van der Weide; Yu Lin 003; Ludo Alvado; Frederic Darthenay; Yannick Fregeais (ISSCC, 2013)