A New Asymmetric Skewed Buffer Design for Runtime Leakage Power Reduction. - Yu-Shiang Lin; Dennis Sylvester (VLSI Design, 2005)

A low-complexity MP3 algorithm that uses a new rate control and a fast dequantization. - Chih-Hsu Yen; Yu-Shiang Lin; Bing-Fei Wu (IEEE Trans. Consumer Electron., 2005)

Runtime leakage power estimation technique for combinational circuits. - Yu-Shiang Lin; Dennis Sylvester (ASP-DAC, 2007)

A sub-pW timer using gate leakage for ultra low-power sub-Hz monitoring systems. - Yu-Shiang Lin; Dennis Sylvester; David T. Blaauw (CICC, 2007)

An efficient implementation of a low-complexity MP3 algorithm with a stream cipher. - Chih-Hsu Yen; Yu-Shiang Lin; Bing-Fei Wu (Multim. Tools Appl., 2007)

An ultra low power 1V, 220nW temperature sensor for passive wireless applications. - Yu-Shiang Lin; Dennis Sylvester; David T. Blaauw (CICC, 2008)

Low-voltage circuit design for widespread sensing applications. - Yu-Shiang Lin; Scott Hanson; Fabio Albano; Carlos Tokunaga; Razi-Ul Haque; Kensall D. Wise; Ann Marie Sastry; David T. Blaauw; Dennis Sylvester (ISCAS, 2008)

Single stage static level shifter design for subthreshold to I/O voltage conversion. - Yu-Shiang Lin; Dennis Sylvester (ISLPED, 2008)

Near-field communication using phase-locking and pulse signaling for millimeter-scale systems. - Yu-Shiang Lin; Dennis Sylvester; David T. Blaauw (CICC, 2009)

A 150pW program-and-hold timer for ultra-low-power sensor platforms. - Yu-Shiang Lin; Dennis Sylvester; David T. Blaauw (ISSCC, 2009)

A Low-Voltage Processor for Sensing Applications With Picowatt Standby Mode. - Scott Hanson; Mingoo Seok; Yu-Shiang Lin; Zhiyoong Foo; Daeyeon Kim; Yoonmyung Lee; Nurrachman Liu; Dennis Sylvester; David T. Blaauw (IEEE J. Solid State Circuits, 2009)

Alignment-Independent Chip-to-Chip Communication for Sensor Applications Using Passive Capacitive Signaling. - Yu-Shiang Lin; Dennis Sylvester; David T. Blaauw (IEEE J. Solid State Circuits, 2009)

Circuit design advances to enable ubiquitous sensing environments. - Mingoo Seok; Scott Hanson; Michael Wieckowski; Gregory K. Chen; Yu-Shiang Lin; David T. Blaauw; Dennis Sylvester (ISCAS, 2010)

GPU-based cloud service for multiple sequence alignments with regular expression constrains. - Yu-Shiang Lin; Chun-Yuan Lin; Yeh-Ching Chung (CloudCom, 2012)

Parallel UPGMA Algorithm on Graphics Processing Units Using CUDA. - Yu-Rong Chen; Che-Lun Hung; Yu-Shiang Lin; Chun-Yuan Lin; Tien-Lin Lee; Kual-Zheng Lee (HPCC-ICESS, 2012)

A pipeline architecture with 1-cycle timing error correction for low voltage operations. - Insup Shin; Jae-Joon Kim; Yu-Shiang Lin; Youngsoo Shin (ISLPED, 2013)

Multiple Sequence Alignments with Regular Expression Constraints on a Cloud Service System. - Yu-Shiang Lin; Chun-Yuan Lin; Hsiao-Chieh Chi; Yeh-Ching Chung (Int. J. Grid High Perform. Comput., 2013)

A Millimeter-Scale Energy-Autonomous Sensor System With Stacked Battery and Solar Cells. - Matthew Fojtik; Daeyeon Kim; Gregory K. Chen; Yu-Shiang Lin; David Fick; Junsun Park; Mingoo Seok; Mao-Ter Chen; Zhiyoong Foo; David T. Blaauw; Dennis Sylvester (IEEE J. Solid State Circuits, 2013)

Efficient parallel algorithm for compound comparisons on multi-GPUs. - Chun-Yuan Lin; Chung-Hung Wang; Che-Lun Hung; Yu-Shiang Lin (BIBM, 2014)

Row Based Dual-VDD Island Generation and Placement. - Hua Xiang 001; Haifeng Qian; Ching Zhou; Yu-Shiang Lin; Fanchieh Yee; Andrew Sullivan; Pong-Fei Lu (DAC, 2014)

Efficient parallel algorithm for multiple sequence alignments with regular expression constraints on graphics processing units. - Chun-Yuan Lin; Yu-Shiang Lin (Int. J. Comput. Sci. Eng., 2014)

CUDA ClustalW: An efficient parallel algorithm for progressive multiple sequence alignment on Multi-GPUs. - Che-Lun Hung; Yu-Shiang Lin; Chun-Yuan Lin; Yeh-Ching Chung; Yi-Fang Chung (Comput. Biol. Chem., 2015)

GPU-UPGMA: high-performance computing for UPGMA algorithm based on graphics processing units. - Yu-Shiang Lin; Chun-Yuan Lin; Che-Lun Hung; Yeh-Ching Chung; Kual-Zheng Lee (Concurr. Comput. Pract. Exp., 2015)

Synthesis design strategies for energy-efficient microprocessors. - Ching Zhou; Yu-Shiang Lin; Pong-Fei Lu; Bruce M. Fleischer; David J. Frank; Leland Chang (ICCD, 2016)

Gate movement for timing improvement on row based Dual-VDD designs. - Hua Xiang 001; Lakshmi N. Reddy; Haifeng Qian; Ching Zhou; Yu-Shiang Lin; Fanchieh Yee; Andrew Sullivan; Pong-Fei Lu (ISQED, 2016)

One-Cycle Correction of Timing Errors in Pipelines With Standard Clocked Elements. - Insup Shin; Jae-Joon Kim; Yu-Shiang Lin; Youngsoo Shin (IEEE Trans. Very Large Scale Integr. Syst., 2016)

qCUDA: GPGPU Virtualization for High Bandwidth Efficiency. - Yu-Shiang Lin; Chun-Yuan Lin; Che-Rung Lee; Yeh-Ching Chung (CloudCom, 2019)

Performance Optimization for InfiniBand Virtualization on QEMU/KVM. - Ming-ting Wei; Yu-Shiang Lin; Che-Rung Lee (CloudCom, 2019)

Efficient Group Fault Tolerance for Multi-tier Services in Cloud Environments. - Chieh-Yu Yu; Che-Rung Lee; Po-Jui Tsao; Yu-Shiang Lin; Tzi-Cker Chiueh (ICC, 2020)

Deep Learning-Based Hepatocellular Carcinoma Histopathology Image Classification: Accuracy Versus Training Dataset Size. - Yu-Shiang Lin; Pei-Hsin Huang; Yung-Yaw Chen (IEEE Access, 2021)

A Novel Two-Stage Induced Deep Learning System for Classifying Similar Drugs with Diverse Packaging. - Yu-Sin You; Yu-Shiang Lin (Sensors, 2023)

StockQM: A Cross-Frequency Dataset for Stock Prediction and a New Stock Prediction Model. - Kuan-Hsien Liu; Yu-Shiang Lin; Tsung-Jung Liu; Wei-Shen Tai (ICCE-Taiwan, 2024)