Sound Source Localization Using a Convolutional Neural Network and Regression Model. - Tan-Hsu Tan; Yu-Tang Lin; Yang-Lang Chang; Mohammad Alkhaleefah (Sensors, 2021)

Improved 3D DRAM Design Based on Gate-Controlled Thyristor Featuring Two Asymmetrical Horizontal WL's and Vertical BL for Better Cell Size Scaling and Array Selection. - Wei-Chen Chen; Hang-Ting Lue; Ming-Hung Wu; Yu-Tang Lin; Keh-Chung Wang; Chih-Yuan Lu (IMW, 2024)

Multi-Gate Access Transistor to Minimize GIDL Leakage Current for Scaling 2-tier Stacked 4F2 DRAM Below Equivalent 10nm Node. - Hang-Ting Lue; Wei-Chen Chen; Yu-Tang Lin; Keh-Chung Wang; Chih-Yuan Lu (IMW, 2024)