Automating the Design of Processor/Accelerator Embedded Systems with LegUp High-Level Synthesis. - Blair Fort; Andrew Canis; Jongsok Choi; Nazanin Calagar; Ruolong Lian; Stefan Hadjis; Yu Ting Chen; Mathew Hall; Bain Syrowik; Tomasz S. Czajkowski; Stephen Brown 003; Jason Helge Anderson (EUC, 2014)

LegUp High-Level Synthesis. - Andrew Canis; Jongsok Choi; Blair Fort; Bain Syrowik; Ruolong Lian; Yu Ting Chen; Hsuan Hsiao; Jeffrey B. Goeders; Stephen Brown 003; Jason Helge Anderson (FPGAs for Software Programmers, 2016)

A Survey and Evaluation of FPGA High-Level Synthesis Tools. - Razvan Nane; Vlad Mihai Sima; Christian Pilato; Jongsok Choi; Blair Fort; Andrew Canis; Yu Ting Chen; Hsuan Hsiao; Stephen Brown 003; Fabrizio Ferrandi; Jason Helge Anderson; Koen Bertels (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Automated generation of banked memory architectures in the high-level synthesis of multi-threaded software. - Yu Ting Chen; Jason Helge Anderson (FPL, 2017)

EASY: Efficient Arbiter SYnthesis from Multi-threaded Code. - Jianyi Cheng; Shane T. Fleming; Yu Ting Chen; Jason Helge Anderson; George A. Constantinides (FPGA, 2019)

High-Level Synthesis Techniques to Generate Deeply Pipelined Circuits for FPGAs with Registered Routing. - Yu Ting Chen; Jin Hee Kim; Kexin Li; Graham Hoyes; Jason Helge Anderson (FPT, 2019)

Efficient Memory Arbitration in High-Level Synthesis From Multi-Threaded Code. - Jianyi Cheng; Shane T. Fleming; Yu Ting Chen; Jason Helge Anderson; John Wickerson; George A. Constantinides (IEEE Trans. Computers, 2022)