Virtual self-timed blocks for systems-on-chip. - Yuan Chen 002; Fei Xia 001; Alexandre Yakovlev (ISCAS, 2006)

The Design of Virtual Self-timed Block for Activity Communication in SOC. - Yuan Chen 002; Fei Xia 001; Delong Shang; Alexandre Yakovlev (ACSD, 2007)

Fine-grain stochastic modelling of dynamic power management policies and analysis of their power - latency tradeoffs. - Yuan Chen 002; Fei Xia 001; Delong Shang; Alexandre Yakovlev (IET Softw., 2009)

High level modelling and design of a low powered event processor. - Yuan Chen 002 (2009)

Stochastic analysis of power, latency and the degree of concurrency. - Yuan Chen 002; Isi Mitrani; Delong Shang; Fei Xia 001; Alexandre Yakovlev (ISCAS, 2010)