A low-power 64-point FFT/IFFT design for IEEE 802.11a WLAN application. - Chin-Teng Lin; Yuan-Chu Yu; Lan-Da Van (ISCAS, 2006)

VLSI Architecture for the Low-Computation Cycle and Power-Efficient Recursive DFT/IDFT Design. - Lan-Da Van; Chin-Teng Lin; Yuan-Chu Yu (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Cost-Effective Triple-Mode Reconfigurable Pipeline FFT/IFFT/2-D DCT Processor. - Chin-Teng Lin; Yuan-Chu Yu; Lan-Da Van (IEEE Trans. Very Large Scale Integr. Syst., 2008)