Scaling Deep-Learning Inference with Chiplet-based Architecture and Photonic Interconnects. - Yuan Li 029; Ahmed Louri; Avinash Karanth (DAC, 2021)

ALPHA: A Learning-Enabled High-Performance Network-on-Chip Router Design for Heterogeneous Manycore Architectures. - Yuan Li 029; Ahmed Louri (IEEE Trans. Sustain. Comput., 2021)

AGAPE: Anomaly Detection with Generative Adversarial Network for Improved Performance, Energy, and Security in Manycore Systems. - Ke Wang 030; Hao Zheng 005; Yuan Li 029; Jiajun Li; Ahmed Louri (DATE, 2022)

SPACX: Silicon Photonics-based Scalable Chiplet Accelerator for DNN Inference. - Yuan Li 029; Ahmed Louri; Avinash Karanth (HPCA, 2022)

Ascend: A Scalable and Energy-Efficient Deep Neural Network Accelerator With Photonic Interconnects. - Yuan Li 029; Ke Wang 030; Hao Zheng 005; Ahmed Louri; Avinash Karanth (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

SPRINT: A High-Performance, Energy-Efficient, and Scalable Chiplet-Based Accelerator With Photonic Interconnects for CNN Inference. - Yuan Li 029; Ahmed Louri; Avinash Karanth (IEEE Trans. Parallel Distributed Syst., 2022)

SecureNoC: A Learning-Enabled, High-Performance, Energy-Efficient, and Secure On-Chip Communication Framework Design. - Ke Wang 030; Hao Zheng 005; Yuan Li 029; Ahmed Louri (IEEE Trans. Sustain. Comput., 2022)

A Silicon Photonic Multi-DNN Accelerator. - Yuan Li 029; Ahmed Louri; Avinash Karanth (PACT, 2023)

A High-Performance and Energy-Efficient Photonic Architecture for Multi-DNN Acceleration. - Yuan Li 029; Ahmed Louri; Avinash Karanth (IEEE Trans. Parallel Distributed Syst., 2024)

MERIT: A Sustainable DNN Accelerator Design With Photonic Phase-Change Memory. - Yuan Li 029; Ahmed Louri; Avinash Karanth (IEEE Trans. Sustain. Comput., 2025)