A 239-281GHz Sub-THz imager with 100MHz resolution by CMOS direct-conversion receiver with on-chip circular-polarized SIW antenna. - Yang Shang; Hao Yu 001; Chang Yang; Yuan Liang 004; Wei Meng Lim (CICC, 2014)

An energy efficient and low cross-talk CMOS sub-THz I/O with surface-wave modulator and interconnect. - Yuan Liang 004; Hao Yu 001; Junfeng Zhao 003; Wei Yang; Yuangang Wang (ISLPED, 2015)

An Energy Efficient CMOS Sub-THz Interconnect with Surface Plasmonic Converter and Oscillator. - Yuan Liang 004; Guangyin Feng; Xiaojian Fu; Hao Yu 001 (NANOCOM, 2016)

An Energy-efficient Adaptive Sub-THz Wireless Interconnect with MIMO-Beamforming between Cores and DRAMs. - Zichuan Liu; Yuan Liang 004; Nan Li; Guangyin Feng; Hao Yu 001; Shaojie Chen (NANOCOM, 2016)

D-Band Surface-Wave Modulator and Signal Source with 40 dB Extinction Ratio and 3.7mW Output Power in 65 nm CMOS. - Yuan Liang 004; Hao Yu 001; Chirn Chye Boon; Chenyang Li 008; Dietmar Kissinger; Yong Wang (ESSCIRC, 2018)

Design and Analysis of $D$ -Band On-Chip Modulator and Signal Source Based on Split-Ring Resonator. - Yuan Liang 004; Chirn Chye Boon; Chenyang Li 008; Xiao-Lan Tang; Herman Jalli Ng; Dietmar Kissinger; Yong Wang; Qingfeng Zhang; Hao Yu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2019)

A 3GS/s Highly Linear Energy Efficient Constant-Slope Based Voltage-to-Time Converter. - Qian Chen 027; Yuan Liang 004; Bongjin Kim; Chirn Chye Boon (ISCAS, 2020)

Multi-Channel FSK Inter/Intra-Chip Communication by Exploiting Field-Confined Slow-Wave Transmission Line. - Qian Chen 027; Chirn Chye Boon; Xueyong Zhang; Chenyang Li 008; Yuan Liang 004; Zhe Liu 038; Ting Guo (ISCAS, 2020)

A 6bit 1.2GS/s Symmetric Successive Approximation Energy-Efficient Time-to-Digital Converter in 40nm CMOS. - Qian Chen 027; Yuan Liang 004; Chirn Chye Boon (ISCAS, 2020)

Millimetre-Wave and Terahertz Antennas and Directional Coupler Enabled by Wafer-Level Packaging Platform with Interposer. - Yuan Liang 004; Chirn Chye Boon; Qian Chen 027; Yangtao Dong (ISCAS, 2021)

A Low-Power Quadrature LO Generator With Mutual Power-Supply Rejection Technique. - Ao Zhou 003; Xin Ding 003; Chirn Chye Boon; Liter Siek; Yuan Liang 004; Yangtao Dong (IEEE Access, 2021)

A 0.6 V 4 GS/s -56.4 dB THD Voltage-to-Time Converter in 28 nm CMOS. - Qian Chen 027; Chirn Chye Boon; Yuan Liang 004 (IEEE Access, 2022)

A Single-Channel 10GS/s 8b>36.4d8 SNDR Time-Domain ADC Featuring Loop-Unrolled Asynchronous Successive Approximation in 28nm CMOS. - Oian Chen; Yuan Liang 004; Chirn Chye Boon; Oing Liu (ISSCC, 2023)

A Single-Channel Voltage-Scalable 8-GS/s 8-b >37.5-dB SNDR Time-Domain ADC With Asynchronous Pipeline Successive Approximation in 28-nm CMOS. - Qian Chen 027; Chirn Chye Boon; Qing Liu 005; Yuan Liang 004 (IEEE J. Solid State Circuits, 2023)

On-chip SRR and CSRR for millimeter-wave integrated systems: Review and applications. - Ke Yang; Yuan Liang 004; Hao Chi Zhang; Guangyin Feng (Microelectron. J., 2023)

Review of recent progress on solid-state millimeter-wave and terahertz signal sources. - Yiqian Shan; Yuan Liang 004; Chenyang Li 008; Weifeng Sun; Zhongyuan Fang (Int. J. Circuit Theory Appl., 2024)