On the Performance Guarantees of the Minimum Multisets Binding (MMB) Problem. - Yuan-Long Jeang; Jhing-Fa Wang; Jau-Yien Lee (J. Inf. Sci. Eng., 1991)

High throughput pipelined data path synthesis by conserving the regularity of nested loops. - Yuan-Long Jeang; Yu-Chin Hsu; Jhing-Fa Wang; Jau-Yien Lee (ICCAD, 1993)

The determination of the cycle length in high level synthesis. - Ming-Hwa Sheu; Yuan-Long Jeang; Jhing-Fa Wang; Jau-Yien Lee (Integr., 1993)

An optimal PCM codec soft IP generator and its application. - Gwo-Yang Wu; Liang-Bi Chen; Yuan-Long Jeang; Gwo-Jia Jong (FPT, 2002)

An embedded in-circuit emulator generator for SOC platform. - Yuan-Long Jeang; Liang-Bi Chen; Yi-Ting Chou; Hsin-Chia Su (FPT, 2003)

Design of FPGA-based adaptive remote calibration control system. - Yuan-Long Jeang; Liang-Bi Chen; Chia-Pin Huang; Yu-Hsiang Hsu; Ming-Yu Yeh; Kai-Ming Yang (FPT, 2003)

A Binary Tree Based Methodology for Designing an Application Specific Network-on-Chip (ASNOC). - Yuan-Long Jeang; Jer-Min Jou; Win-Hsien Huang (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)

Design of a Dynamic PCM Selector for Non-deterministic Environment. - Liang-Bi Chen; Ing-Jer Huang; Yuan-Long Jeang (APCCAS, 2006)

A Pre-processing Based Real-Time Address Tracer for Embedded Microprocessors. - Yuan-Long Jeang; Tzuu-Shaang Wey; Hung-Yu Wang; Ching-Ta Chen (ICECS, 2006)

A New and Efficient Real-Time Address Tracer for Embedded Microprocessors. - Yuan-Long Jeang; Ching-Ta Chen; Chih-Chung Tai (ICICIC (2), 2006)

A New EmbeddedWavelet Image Coding Based on Zero-block and Array (N-EZBA) and Its Efficient Hardware Implementation. - Yuan-Long Jeang; Ping-Shou Cheng; Jiun-Hau Tu; Kai-Jyun Liang; Ching-Ta Chen (ICICIC (2), 2006)

A Methodology Based on Maximal-Profit Spanning Tree for Designing Application Specific Networks on Chip (ASNOC). - Yuan-Long Jeang; Chung-Wei Hung; Chuen-Muh Chiang (ICICIC (2), 2006)

A New and Efficient Field-Partition Based Code Compression and Its Pipelined Decompression System. - Yuan-Long Jeang; Chih-Chung Tai; Yong-Zong Lin (ICICIC (2), 2006)

A Single-Stream Pipelined Instruction Decompression System for Embedded Microprocessors. - Yuan-Long Jeang; Tzuu-Shaang Wey; Hung-Yu Wang; Chih-Chung Tai (IIH-MSP, 2006)

New model-driven design and generation of multi-facet arbiters part I: from the design model to the architecture model. - Jer-Min Jou; Sih-Sian Wu; Yun-Lung Lee; Cheng Chou; Yuan-Long Jeang (DAC, 2010)

A Pipelined Program Decompression Engine Generator Based on Partial Field-Partitioned (PFP) Compression Technique for Embedded Systems. - Yuan-Long Jeang; Ko-Yen Hu (IIH-MSP, 2010)

CMOS current mirror with enhanced input dynamic range. - Hung-Yu Wang; Yuan-Long Jeang; Ying-Chuan Liu; Yu-Wei Huang (Int. J. Circuit Theory Appl., 2010)