Realization of a Power-Efficient Transmitter Based on Integrated Artificial Neural Network. - Deyu Kong; Shaogang Hu; Yuancong Wu; Junjie Wang 008; Canlong Xiong; Qi Yu 002; Zhengyu Shi; Zhen Liu 013; Tupei Chen; You Yin; Sumio Hosaka; Yang Liu 062 (IEEE Access, 2018)

Design of a Neural Network-Based VCO With High Linearity and Wide Tuning Range. - Rui Guo; Kun Qian; Jinping Wei; Tupei Chen; Yanchen Liu; Deyu Kong; Junjie Wang 008; Yuancong Wu; Shaogang Hu; Qi Yu 002; Yang Liu 062 (IEEE Access, 2019)

Implementation of a Low Noise Amplifier With Self-Recovery Capability. - Yanchen Liu; Caizhi Zhang; Tupei Chen; Deyu Kong; Rui Guo; Junjie Wang 008; Yuancong Wu; Shaogang Hu; L. M. Rong; Qi Yu 002; Yang Liu 062 (IEEE Access, 2019)

An energy-efficient deep convolutional neural networks coprocessor for multi-object detection. - Yuancong Wu; Junjie Wang 008; Kun Qian; Yanchen Liu; Rui Guo; Shaogang Hu; Qi Yu 002; Tupei Chen; Yang Liu 062; Limei Rong (Microelectron. J., 2020)

Application of Deep Compression Technique in Spiking Neural Network Chip. - Yanchen Liu; Kun Qian; Shaogang Hu; Kun An; Sheng Xu; Xitong Zhan; Junjie Wang 008; Rui Guo; Yuancong Wu; Tupei Chen; Qi Yu 002; Yang Liu 062 (IEEE Trans. Biomed. Circuits Syst., 2020)

Design of a constant loop bandwidth phase-locked loop based on artificial neural network. - Rui Guo; Yuancong Wu; Shaogang Hu; Qi Yu 002; Tupei Chen; Yang Liu 062 (IEICE Electron. Express, 2021)

Design and Implementation of a Hybrid, ADC/DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip. - Junjie Wang 008; Teng Zhang; Shuang Liu 007; Yihe Liu; Yuancong Wu; Shaogang Hu; Tupei Chen; Yang Liu 062; Yuchao Yang 001; Ru Huang 001 (IEEE J. Solid State Circuits, 2024)