Clock Aware Low Power Placement. - Jinghao Ding; Linhao Lu; Zhaoqi Fu; Jie Ma; Mengshi Gong; Yuanrui Qi; Wenxin Yu 001 (ICCAD, 2023)

Track Assignment Using Gradient Indication and Simulated Annealing. - Yuanrui Qi; Zejun Gan; Jinghao Ding; Zhaoqi Fu; Mengshi Gong; Wenxin Yu 001 (ISCAS, 2024)

An Effective and Efficient Cross-Link Insertion for Non-Tree Clock Network Synthesis. - Jinghao Ding; Jiazhi Wen; Hao Tang; Zhaoqi Fu; Mengshi Gong; Yuanrui Qi; Wenxin Yu 001; Jinjia Zhou (DATE, 2025)

An Effective Macro Placement Framework with Reinforcement Learning and Monte Carlo Tree Search. - Jinghao Ding; Wenxin Yu 001; Yuanrui Qi; Zhaoqi Fu; Mengshi Gong; I-Chyn Wey; Jinjia Zhou (ACM Great Lakes Symposium on VLSI, 2025)