BluePower - A New Distributed Multihop Scatternet Formation Protocol for Bluetooth Networks. - Yuanrui Zhang; Shu Liu; Weijia Jia 001; Xu Cheng 001 (ICPP, 2005)

Topology-Aware I/O Caching for Shared Storage Systems. - Seung Woo Son 001; Mahmut T. Kandemir; Yuanrui Zhang; Rajat Garg (PDCCS, 2009)

Slicing based code parallelization for minimizing inter-processor communication. - Mahmut T. Kandemir; Yuanrui Zhang; Sai Prashanth Muralidhara; Ozcan Ozturk 001; Sri Hari Krishna Narayanan (CASES, 2009)

Adaptive prefetching for shared cache based chip multiprocessors. - Mahmut T. Kandemir; Yuanrui Zhang; Ozcan Ozturk 001 (DATE, 2009)

Exploring parallelization strategies for NUFFT data translation. - Yuanrui Zhang; Mahmut T. Kandemir; Nikos Pitsianis; Xiaobai Sun (EMSOFT, 2009)

Optimizing shared cache behavior of chip multiprocessors. - Mahmut T. Kandemir; Sai Prashanth Muralidhara; Sri Hari Krishna Narayanan; Yuanrui Zhang; Ozcan Ozturk 001 (MICRO, 2009)

A hardware-software codesign strategy for Loop intensive applications. - Yuanrui Zhang; Mahmut T. Kandemir (SASP, 2009)

A special-purpose compiler for look-up table and code generation for function evaluation. - Yuanrui Zhang; Lanping Deng; Praveen Yedlapalli; Sai Prashanth Muralidhara; Hui Zhao 013; Mahmut T. Kandemir; Chaitali Chakrabarti; Nikos Pitsianis; Xiaobai Sun (DATE, 2010)

Scalable Parallelization Strategies to Accelerate NuFFT Data Translation on Multicores. - Yuanrui Zhang; Jun Liu 008; Emre Kultursay; Mahmut T. Kandemir; Nikos Pitsianis; Xiaobai Sun (Euro-Par (2), 2010)

Accelerating Reconfiguration for Degradable Mesh-Connected Processor Arrays. - Jing Wang; Wu Jigang; Yuanrui Zhang; Dakun Zhang (PAAP, 2010)

Cache topology aware computation mapping for multicores. - Mahmut T. Kandemir; Taylan Yemliha; Sai Prashanth Muralidhara; Shekhar Srikantaiah; Mary Jane Irwin; Yuanrui Zhang (PLDI, 2010)

Automated Tracing of I/O Stack. - Seong Jo Kim; Yuanrui Zhang; Seung Woo Son 001; Ramya Prabhakar; Mahmut T. Kandemir; Christina M. Patrick; Wei-keng Liao; Alok N. Choudhary (EuroMPI, 2010)

Optimizing Data Layouts for Parallel Computation on Multicores. - Yuanrui Zhang; Wei Ding 008; Jun Liu 008; Mahmut T. Kandemir (PACT, 2011)

Neighborhood-aware data locality optimization for NoC-based multicores. - Mahmut T. Kandemir; Yuanrui Zhang; Jun Liu 008; Taylan Yemliha (CGO, 2011)

On-chip cache hierarchy-aware tile scheduling for multicore machines. - Jun Liu 008; Yuanrui Zhang; Wei Ding 008; Mahmut T. Kandemir (CGO, 2011)

Multilayer Cache Partitioning for Multiprogram Workloads. - Mahmut T. Kandemir; Ramya Prabhakar; Mustafa Karaköy; Yuanrui Zhang (Euro-Par (1), 2011)

Bandwidth Constrained Coordinated HW/SW Prefetching for Multicores. - Sai Prashanth Muralidhara; Mahmut T. Kandemir; Yuanrui Zhang (Euro-Par (1), 2011)

Software-directed data access scheduling for reducing disk energy consumption. - Yuanrui Zhang; Jun Liu 008; Ellis Herbert Wilson; Mahmut T. Kandemir (HPDC, 2011)

Optimizing data locality using array tiling. - Wei Ding 008; Yuanrui Zhang; Jun Liu 008; Mahmut T. Kandemir (ICCAD, 2011)

A data layout optimization framework for NUCA-based multicores. - Yuanrui Zhang; Wei Ding 008; Mahmut T. Kandemir; Jun Liu 008; Ohyoung Jang (MICRO, 2011)

Studying inter-core data reuse in multicores. - Yuanrui Zhang; Mahmut T. Kandemir; Taylan Yemliha (SIGMETRICS, 2011)

BrickX: building hybrid systems for recursive computations. - Yuanrui Zhang; Jun Liu 008; Sai Prashanth Muralidhara; Mahmut T. Kandemir (SIGMETRICS Perform. Evaluation Rev., 2011)

Accurate Area, Time and Power Models for FPGA-Based Implementations. - Lanping Deng; Kanwaldeep Sobti; Yuanrui Zhang; Chaitali Chakrabarti (J. Signal Process. Syst., 2011)

Off-chip access localization for NoC-based multicores. - Wei Ding 008; Mahmut T. Kandemir; Yuanrui Zhang; Emre Kultursay (PACT, 2012)

A hybrid NoC design for cache coherence optimization for chip multiprocessors. - Hui Zhao 013; Ohyoung Jang; Wei Ding 008; Yuanrui Zhang; Mahmut T. Kandemir; Mary Jane Irwin (DAC, 2012)

Software-Directed Data Access Scheduling for Reducing Disk Energy Consumption. - Yuanrui Zhang; Jun Liu 008; Mahmut T. Kandemir (ICDCS, 2012)

Algorithm for Communication Synchronization on Reconfigurable Processor Arrays with Faults. - Jigang Wu; Guiyuan Jiang; Yuanrui Zhang; Yuanbo Zhu (IPDPS Workshops, 2012)

A compiler framework for extracting superword level parallelism. - Jun Liu 008; Yuanrui Zhang; Ohyoung Jang; Wei Ding 008; Mahmut T. Kandemir (PLDI, 2012)

Automatic Parallel Code Generation for NUFFT Data Translation on multicores. - Yuanrui Zhang; Jun Liu 008; Emre Kultursay; Mahmut T. Kandemir; Nikos Pitsianis; Xiaobai Sun (J. Circuits Syst. Comput., 2012)

Locality-aware mapping and scheduling for multicores. - Wei Ding 008; Yuanrui Zhang; Mahmut T. Kandemir; Jithendra Srinivas; Praveen Yedlapalli (CGO, 2013)

Compiler-directed file layout optimization for hierarchical storage systems. - Wei Ding 008; Yuanrui Zhang; Mahmut T. Kandemir; Seung Woo Son 001 (Sci. Program., 2013)

Investigation of secure wireless regions using configurable beamforming on WARP. - Yuanrui Zhang; Bei Yin; Roger F. Woods; Joseph R. Cavallaro; Alan Marshall 001; Youngwook Ko (ACSSC, 2014)

Creating secure wireless regions using configurable beamforming. - Yuanrui Zhang; Alan Marshall 001; Roger F. Woods; Youngwook Ko (PIMRC, 2014)

A Hybrid Clock System Related to STeC Language. - Yixiang Chen 001; Yuanrui Zhang (SERE (Companion), 2014)

Timed Automata Semantics of Spatial-Temporal Consistency Language STeC. - Yuanrui Zhang; Frédéric Mallet; Yixiang Chen 001 (TASE, 2014)

A Framework for Data-Driven Automata Design. - Yuanrui Zhang; Yixiang Chen 001; Yujing Ma (APRES, 2015)

Optimizing off-chip accesses in multicores. - Wei Ding 008; Xulong Tang; Mahmut T. Kandemir; Yuanrui Zhang; Emre Kultursay (PLDI, 2015)

PSTEP - A Novel Probabilistic Event Processing Language for Uncertain Spatio-temporal Event Streams of Internet of Vehicles. - Huiyong Li; Yuanrui Zhang; Yixiang Chen 001 (QRS Companion, 2015)

IOPro: a parallel I/O profiling and visualization framework for high-performance storage systems. - Seong Jo Kim; Yuanrui Zhang; Seung Woo Son 001; Mahmut T. Kandemir; Wei-keng Liao; Rajeev Thakur; Alok N. Choudhary (J. Supercomput., 2015)

On spatial security outage probability derivation of exposure region based beamforming with randomly located eavesdroppers. - Yuanrui Zhang; Youngwook Ko; Roger F. Woods; Alan Marshall 001; Joe Cavallaro; Kaipeng Li (ACSSC, 2016)

PSTeC: A Location-Time Driven Modelling Formalism for Probabilistic Real-Time Systems. - Kangli He; Yixiang Chen 001; Min Zhang 007; Yuanrui Zhang (MMB/DFT, 2016)

A Self-Adaptive Traffic Light Control System Based on Speed of Vehicles. - Jinyang Li; Yuanrui Zhang; Yixiang Chen 001 (QRS Companion, 2016)

A UTP Refinement Model of the STeC Language. - Yuanrui Zhang; Yujing Ma; Yixiang Chen 001 (QRS Companion, 2016)

Wireless Security with Beamforming Technique. - Yuanrui Zhang (CoRR, 2016)

Defining Spatial Security Outage Probability for Exposure Region Based Beamforming. - Yuanrui Zhang; Youngwook Ko; Roger F. Woods; Alan Marshall 001 (CoRR, 2016)

Defining Spatial Secrecy Outage Probability for Exposure Region-Based Beamforming. - Yuanrui Zhang; Youngwook Ko; Roger F. Woods; Alan Marshall 001 (IEEE Trans. Wirel. Commun., 2017)

Embedding CCSL into Dynamic Logic: A Logical Approach for the Verification of CCSL Specifications. - Yuanrui Zhang; Hengyang Wu; Yixiang Chen 001; Frédéric Mallet (FTSCS, 2018)

Security Optimization of Exposure Region-Based Beamforming With a Uniform Circular Array. - Yuanrui Zhang; Roger F. Woods; Youngwook Ko; Alan Marshall 001; Junqing Zhang (IEEE Trans. Commun., 2018)

A Logical Approach for the Schedulability Analysis of CCSL. - Yuanrui Zhang; Frédéric Mallet; Huibiao Zhu; Yixiang Chen 001 (TASE, 2019)

A Process Algebra With Qualitative Calculus for Modeling Spatio-Temporal Behaviour. - Yuanrui Zhang; Yixiang Chen 001; Hengyang Wu (IEEE Access, 2019)

A verification framework for spatio-temporal consistency language with CCSL as a specification language. - Yuanrui Zhang; Frédéric Mallet; Yixiang Chen 001 (Frontiers Comput. Sci., 2020)

A Dynamic Logic for Verification of Synchronous Models based on Theorem Proving. - Yuanrui Zhang (CoRR, 2021)

A clock-based dynamic logic for schedulability analysis of CCSL specifications. - Yuanrui Zhang; Frédéric Mallet; Huibiao Zhu; Yixiang Chen 001; Bo Liu 033; Zhiming Liu 001 (Sci. Comput. Program., 2021)

A clock-based dynamic logic for the verification of CCSL specifications in synchronous systems. - Yuanrui Zhang; Hengyang Wu; Yixiang Chen 001; Frédéric Mallet (Sci. Comput. Program., 2021)

A dynamic logic for verification of synchronous models based on theorem proving. - Yuanrui Zhang; Frédéric Mallet; Zhiming Liu 001 (Frontiers Comput. Sci., 2022)

Image Reflection on LLEE Charts - Another Proof for the Completeness of an Axiomatization of 1-Free Regular Expressions Modulo Bisimilarity. - Yuanrui Zhang; Xinxin Liu (CoRR, 2023)

Parameterized Dynamic Logic - Towards A Cyclic Logical Framework for Program Verification via Operational Semantics. - Yuanrui Zhang (CoRR, 2024)

A dynamic logic with branching modalities. - Yuanrui Zhang; Zhiming Liu 001 (J. Log. Algebraic Methods Program., 2024)

Specification and Verification of Multi-Clock Systems Using a Temporal Logic with Clock Constraints. - Yuanrui Zhang; Frédéric Mallet; Min Zhang 002; Zhiming Liu 001 (Formal Aspects Comput., 2024)