Suitable-Compensation Circuit Design for a PAM4 Transmitter in 180-nm CMOS. - Yudai Ichii; Ryosuke Noguchi; Toshiyuki Inoue; Akira Tsuchiya; Keiji Kishine (ISOCC, 2019)

5-Gb/s PAM4 Transmitter IC Using Compensation Circuit in an 180-nm CMOS. - Yudai Ichii; Toshiyuki Inoue; Akira Tsuchiya; Keiji Kishine (ICEIC, 2021)