An On-chip Layer-wise Training Method for RRAM based Computing-in-memory Chips. - Yiwen Geng; Bin Gao 006; Qingtian Zhang; Wenqiang Zhang; Peng Yao; Yue Xi; Yudeng Lin; Junren Chen; Jianshi Tang; Huaqiang Wu; He Qian (DATE, 2021)

A High-Speed and High-Efficiency Diverse Error Margin Write-Verify Scheme for an RRAM-Based Neuromorphic Hardware Accelerator. - Yudeng Lin; Jianshi Tang; Bin Gao 006; Qi Qin; Qingtian Zhang; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

BETTER: Bayesian-Based Training and Lightweight Transfer Architecture for Reliable and High-Speed Memristor Neural Network Deployment. - Yudeng Lin; Jianshi Tang; Bin Gao 006; Qingtian Zhang; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Uncertainty quantification via a memristor Bayesian deep neural network for risk-sensitive reinforcement learning. - Yudeng Lin; Qingtian Zhang; Bin Gao 006; Jianshi Tang; Peng Yao; Chongxuan Li; Shiyu Huang 001; Zhengwu Liu; Ying Zhou; Yuyi Liu; Wenqiang Zhang; Jun Zhu 001; et al. (Nat. Mac. Intell., 2023)

Deep Bayesian active learning using in-memory computing hardware. - Yudeng Lin; Bin Gao 006; Jianshi Tang; Qingtian Zhang; He Qian; Huaqiang Wu (Nat. Comput. Sci., 2025)