An offset cancellation technique for SRAM sense amplifier based on relation of the delay and offset. - Yue Zhao 029; Jinkai Wang; Zhongzhen Tong; Xiulong Wu; Chunyu Peng; Wenjuan Lu; Qiang Zhao 007; Zhiting Lin (Microelectron. J., 2022)

Configurable Memory With a Multilevel Shared Structure Enabling In-Memory Computing. - Yue Zhao 029; Zhiting Lin; Xiulong Wu; Qiang Zhao 007; Wenjuan Lu; Chunyu Peng; Zhongzhen Tong; Junning Chen (IEEE Trans. Very Large Scale Integr. Syst., 2022)

In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations. - Zhiting Lin; Zhongzhen Tong; Fangming Wang; Jin Zhang 036; Yue Zhao 029; Peng Sun; Tian Xu; Cheng Zhang; Xingwei Li; Xiulong Wu; Wenjuan Lu; Chunyu Peng; et al. (IEEE J. Solid State Circuits, 2023)

In-Memory Transposable Multibit Multiplication Based on Diagonal Symmetry Weight Block. - Zhongzhen Tong; Yue Zhao 029; Jin Zhang 036; Zhiting Lin; Xiaoyang Lin; Xiulong Wu (IEEE Trans. Very Large Scale Integr. Syst., 2023)

SRAM-Based Digital CIM Macro for Linear Interpolation and MAC. - Zhiting Lin; Yunlong Liu; Yaling Wang; Yue Zhao 029; Chunyu Peng; Xiulong Wu (ISCAS, 2024)

Cross-coupled 4T2R multi-logic in-memory computing circuit design. - Zhiting Lin; Changxin Yue; Ke Li; Qiushi Feng; Siyan Li; Yue Zhao 029; Yuanyang Wang; Jiaqi Chen; Wenjuan Lu; Chunyu Peng; Qiang Zhao 007; Chenghu Dai; et al. (Microelectron. J., 2024)

Configurable in-memory computing architecture based on dual-port SRAM. - Yue Zhao 029; Yunlong Liu; Jian Zheng; Zhongzhen Tong; Xin Wang; Runru Yu; Xiulong Wu; Yongliang Zhou; Chunyu Peng; Wenjuan Lu; Qiang Zhao 007; Zhiting Lin (Microelectron. J., 2024)

A 28-nm 9T1C SRAM-Based CIM Macro With Hierarchical Capacitance Weighting and Two-Step Capacitive Comparison ADCs for CNNs. - Zhiting Lin; Runru Yu; Yunhao Li; Miao Long; Yu Liu 030; Jianxing Zhou; Da Huo; Qingchuan Zhu; Yue Zhao 029; Lintao Chen; Chunyu Peng; Qiang Zhao 007; et al. (IEEE Trans. Very Large Scale Integr. Syst., 2025)