10-Bit SAR ADC With Novel Pseudo-Random Capacitor Switching Scheme. - Pai-Hsiang Hsu; Yueh-Ru Lee; Chung-Chih Hung (VLSI-DAT, 2019)

A Low-Noise Area-Efficient Column-Parallel ADC With an Input Triplet for a 120-dB High Dynamic Range CMOS Image Sensor. - Pai-Hsiang Hsu; Yueh-Ru Lee; Chia-Hung Chen; Chung-Chih Hung (IEEE Trans. Very Large Scale Integr. Syst., 2023)