An Architectural Disgn of a Highly Parallel Dataflow Machine. - Yoshinori Yamaguchi; Shuichi Sakai; Kei Hiraki; Yuetsu Kodama (IFIP Congress, 1989)

An Architecture of a Dataflow Single Chip Processor. - Shuichi Sakai; Yoshinori Yamaguchi; Kei Hiraki; Yuetsu Kodama; Toshitsugu Yuba (ISCA, 1989)

Design and Implementation of a Versatile Interconnection Network in the EM-4. - Shuichi Sakai; Yuetsu Kodama; Yoshinori Yamaguchi (ICPP (1), 1991)

Prototype Implementation of a Highly Parallel Dataflow Machine EM-4. - Shuichi Sakai; Yuetsu Kodama; Yoshinori Yamaguchi (IPPS, 1991)

Load balancing by function distribution on the EM-4 prototype. - Yuetsu Kodama; Shuichi Sakai; Yoshinori Yamaguchi (SC, 1991)

Evaluation of the EM-4 Highly Parallel Computer using a Game Tree Searching Problem. - Yuetsu Kodama; Shuichi Sakai; Yoshinori Yamaguchi (FGCS, 1992)

Thread-based Programming for the EM-4 Hybrid Dataflow Machine. - Mitsuhisa Sato; Yuetsu Kodama; Shuichi Sakai; Yoshinori Yamaguchi; Yasuhito Koumura (ISCA, 1992)

A prototype of a highly parallel dataflow machine EM-4 and its preliminary evaluation. - Yuetsu Kodama; Shuichi Sakai; Yoshinori Yamaguchi (Future Gener. Comput. Syst., 1992)

Methodologies in development and testing of the dataflow machine EM-4. - Kazuaki Okamoto; Yuetsu Kodama; Shuichi Sakai; Yoshinori Yamaguchi (Parallel Comput., 1992)

EMC-Y: Parallel Processing Element Optimizing Communication and Computation. - Yuetsu Kodama; Yasuhito Koumura; Mitsuhisa Sato; Hirohumi Sakane; Shuichi Sakai; Yoshinori Yamaguchi (International Conference on Supercomputing, 1993)

Super-Threading: Architectural and Software Mechanisms for Optimizing Parallel Computation. - Shuichi Sakai; Kazuaki Okamoto; Hiroshi Matsuoka; Hideo Hirono; Yuetsu Kodama; Mitsuhisa Sato (International Conference on Supercomputing, 1993)

RICA: Reduced Interprocessor-Communication Architecture - Concept and Mechanisms. - Shuichi Sakai; Hiroshi Matsuoka; Yuetsu Kodama; Mitsuhisa Sato; Andrew Shaw; Hideo Hirono; Kazuaki Okamoto; Takashi Yokota (SPDP, 1993)

Design and Implementation of a Circular Omega Network in the EM-4. - Shuichi Sakai; Yuetsu Kodama; Yoshinori Yamaguchi (Parallel Comput., 1993)

Evaluation of parallel execution performance by highly parallel computer EM-4. - Yuetsu Kodama; Shuichi Sakai; Yoshinori Yamaguchi (Syst. Comput. Jpn., 1993)

EM-C: Programming with Explicit Parallelism and Locality for EM-4 Multiprocessor. - Mitsuhisa Sato; Yuetsu Kodama; Shuichi Sakai; Yoshinori Yamaguchi (IFIP PACT, 1994)

Experience with Executing Shared Memory Programs using Fine-Grain Communication and Multithreading in EM-4. - Mitsuhisa Sato; Yuetsu Kodama; Yoshinori Yamaguchi; Shuichi Sakai (IPPS, 1994)

Message-based efficient remote memory access on a highly parallel computer EM-X. - Yuetsu Kodama; Hirofumi Sakane; Mitsuhisa Sato; Shuichi Sakai; Yoshinori Yamaguchi (ISPAN, 1994)

Nonnumeric search results on the EM-4 distributed-memory multiprocessor. - Andrew Sohn; Mitsuhisa Sato; Shuichi Sakai; Yuetsu Kodama; Yoshinori Yamaguchi (SC, 1994)

Parallel bidirectional heuristic search on the EM-4 multiprocessor. - Andrew Sohn; Mitsuhisa Sato; Shuichi Sakai; Yuetsu Kodama; Yoshinori Yamaguchi (SPDP, 1994)

Programming with Distributed Data Structure for EM-X Multiprocessor. - Mitsuhisa Sato; Yuetsu Kodama; Hirofumi Sakane; Yoshinori Yamaguchi; Shuichi Sakai (Theory and Practice of Parallel Programming, 1994)

A Macrotask-level Unlimited Speculative Execution on Multiprocessors. - Hayato Yamana; Mitsuhisa Sato; Yuetsu Kodama; Hirofumi Sakane; Shuichi Sakai; Yoshinori Yamaguchi (International Conference on Supercomputing, 1995)

The EM-X Parallel Computer: Architecture and Basic Performance. - Yuetsu Kodama; Hirohumi Sakane; Mitsuhisa Sato; Hayato Yamana; Shuichi Sakai; Yoshinori Yamaguchi (ISCA, 1995)

Reduced Interprocessor-Communication Architecture and its Implementation on EM-4. - Shuichi Sakai; Yuetsu Kodama; Mitsuhisa Sato; Andrew Shaw; Hiroshi Matsuoka; Hideo Hirono; Kazuaki Okamoto; Takashi Yokota (Parallel Comput., 1995)

Identifying the capability of overlapping computation with communication. - Andrew Sohn; Jui Ku; Yuetsu Kodama; Mitsuhisa Sato; Hirofumi Sakane; Hayato Yamana; Shuichi Sakai; Yoshinori Yamaguchi (IEEE PACT, 1996)

Parallel Execution of Radix Sort Program Using Fine-Grain Communication. - Yuetsu Kodama; Hirofumi Sakane; Hanpei Koike; Mitsuhisa Sato; Shuichi Sakai; Yoshinori Yamaguchi (IEEE PACT, 1997)

Experience with Fine-Grain Communication in EM-X Multiprocessor for Parallel Sparse Matrix Computation. - Mitsuhisa Sato; Yuetsu Kodama; Hirofumi Sakane; Hayato Yamana; Shuichi Sakai; Yoshinori Yamaguchi (IPPS, 1997)

Fine-Grain Multithreading with the EM-X Multiprocessor. - Andrew Sohn; Yuetsu Kodama; Jui Ku; Mitsuhisa Sato; Hirofumi Sakane; Hayato Yamana; Shuichi Sakai; Yoshinori Yamaguchi (SPAA, 1997)

Load Balanced Parallel Radix Sort. - Andrew Sohn; Yuetsu Kodama (International Conference on Supercomputing, 1998)

Highly Efficient Implementation of MPI Point-to-Point Communication Using Remote Memory Operations. - Osamu Tatebe; Yuetsu Kodama; Satoshi Sekiguchi; Yoshinori Yamaguchi (International Conference on Supercomputing, 1998)

Fast Speculative Search Engine on the Highly Parallel Computer EM-X. - Hayato Yamana; Hanpei Koike; Yuetsu Kodama; Hirofumi Sakane; Yoshinori Yamaguchi (SIGIR, 1998)

Communication Studies of Single-Threaded and Multithreaded Distributed-Memory Multiprocessors. - Andrew Sohn; Yunheung Paek; Jui-Yuan Ku; Yuetsu Kodama; Yoshinori Yamaguchi (HPCA, 1999)

Tolerating Communication Latency through Dynamic Thread Invocation in a Multithreaded Architecture. - Andrew Sohn; Yuetsu Kodama; Jui-Yuan Ku; Mitsuhisa Sato; Yoshinori Yamaguchi (Compiler Optimizations for Scalable Parallel Systems Languages, 2001)

Design and implementation of PVFS-PM: a cluster file system on SCore. - Koji Segawa; Osamu Tatebe; Yuetsu Kodama; Tomohiro Kudoh; Toshiyuki Shimizu (CCGRID, 2003)

GNET-1: gigabit Ethernet network testbed. - Yuetsu Kodama; Tomohiro Kudoh; Ryousei Takano; Hitoshi Sato; Osamu Tatebe; Satoshi Sekiguchi (CLUSTER, 2004)

The Second Trans-Pacific Grid Datafarm Testbed and Experiments for SC2003. - Osamu Tatebe; Hirotaka Ogawa; Yuetsu Kodama; Tomohiro Kudoh; Satoshi Sekiguchi; Satoshi Matsuoka; Kento Aida; Taisuke Boku; Mitsuhisa Sato; Youhei Morita; Yoshinori Kitatsuji; Jim Williams; et al. (SAINT Workshops, 2004)

TCP Adaptation for MPI on Long-and-Fat Networks. - Motohiko Matsuda; Tomohiro Kudoh; Yuetsu Kodama; Ryousei Takano; Yutaka Ishikawa (CLUSTER, 2005)

Efficient MPI Collective Operations for Clusters in Long-and-Fast Networks. - Motohiko Matsuda; Tomohiro Kudoh; Yuetsu Kodama; Ryousei Takano; Yutaka Ishikawa (CLUSTER, 2006)

Effects of packet pacing for MPI programs in a Grid environment. - Ryousei Takano; Motohiko Matsuda; Tomohiro Kudoh; Yuetsu Kodama; Fumihiro Okazaki; Yutaka Ishikawa (CLUSTER, 2007)

Dependable communication using multiple network paths on fast long-distance networks. - Yuetsu Kodama; Tomohiro Kudoh; Toshiyuki Shimizu (Syst. Comput. Jpn., 2007)

High Performance Relay Mechanism for MPI Communication Libraries Run on Multiple Private IP Address Clusters. - Ryousei Takano; Motohiko Matsuda; Tomohiro Kudoh; Yuetsu Kodama; Fumihiro Okazaki; Yutaka Ishikawa; Yasufumi Yoshizawa (CCGRID, 2008)

The design and implementation of MPI collective operations for clusters in long-and-fast networks. - Motohiko Matsuda; Tomohiro Kudoh; Yuetsu Kodama; Ryousei Takano; Yutaka Ishikawa (Clust. Comput., 2008)

Metroflux: A high performance system for analysing flow at very fine-grain. - Patrick Loiseau; Paulo Gonçalves 001; Romaric Guillier; Matthieu Imbert; Yuetsu Kodama; Pascale Vicat-Blanc Primet (TRIDENTCOM, 2009)

Power Reduction Scheme of Fans in a Blade System by Considering the Imbalance of CPU Temperatures. - Yuetsu Kodama; Satoshi Itoh; Toshiyuki Shimizu; Satoshi Sekiguchi; Hiroshi Nakamura; Naohiko Mori (GreenCom/CPSCom, 2010)

Power consumption and efficiency of cooling in a Data Center. - Satoshi Itoh; Yuetsu Kodama; Hiroshi Shimizu; Satoshi Sekiguchi; Hiroshi Nakamura; Naohiko Mori (GRID, 2010)

High-Resolution Timer-Based Packet Pacing Mechanism on the Linux Operating System. - Ryousei Takano; Tomohiro Kudoh; Yuetsu Kodama; Fumihiro Okazaki (IEICE Trans. Commun., 2011)

The study of three-dimensional multiphase-flow simulator. - Kenta Fujinami; Yoshiki Yamaguchi; Akira Sugiura; Yuetsu Kodama (FPL, 2013)

Interconnection Network for Tightly Coupled Accelerators Architecture. - Toshihiro Hanawa; Yuetsu Kodama; Taisuke Boku; Mitsuhisa Sato (Hot Interconnects, 2013)

The Flexible Sound Synthesizer on an FPGA. - Suguru Ochiai; Yoshiki Yamaguchi; Yuetsu Kodama (CANDAR, 2013)

Adaptive Task Size Control on High Level Programming for GPU/CPU Work Sharing. - Tetsuya Odajima; Taisuke Boku; Mitsuhisa Sato; Toshihiro Hanawa; Yuetsu Kodama; Raymond Namyst; Samuel Thibault; Olivier Aumage (ICA3PP (2), 2013)

Tightly Coupled Accelerators Architecture for Minimizing Communication Latency among Accelerators. - Toshihiro Hanawa; Yuetsu Kodama; Taisuke Boku; Mitsuhisa Sato (IPDPS Workshops, 2013)

Imbalance of CPU temperatures in a blade system and its impact for power consumption of fans. - Yuetsu Kodama; Satoshi Itoh; Toshiyuki Shimizu; Satoshi Sekiguchi; Hiroshi Nakamura; Naohiko Mori (Clust. Comput., 2013)

QCD Library for GPU Cluster with Proprietary Interconnect for GPU Direct Communication. - Norihisa Fujita; Hisafumi Fujii; Toshihiro Hanawa; Yuetsu Kodama; Taisuke Boku; Yoshinobu Kuramashi; Mike Clark (Euro-Par Workshops (1), 2014)

A Preliminarily Evaluation of PEACH3: A Switching Hub for Tightly Coupled Accelerators. - Takuya Kuhara; Takahiro Kaneda; Toshihiro Hanawa; Yuetsu Kodama; Taisuke Boku; Hideharu Amano (CANDAR, 2014)

XcalableACC: extension of XcalableMP PGAS language using OpenACC for accelerator clusters. - Masahiro Nakao; Hitoshi Murai; Takenori Shimosaka; Akihiro Tabuchi; Toshihiro Hanawa; Yuetsu Kodama; Taisuke Boku; Mitsuhisa Sato (WACCPD@SC, 2014)

PEACH2: An FPGA-based PCIe network device for Tightly Coupled Accelerators. - Yuetsu Kodama; Toshihiro Hanawa; Taisuke Boku; Mitsuhisa Sato (SIGARCH Comput. Archit. News, 2014)

Towards Unification of Accelerated Computing and Interconnection For Extreme-Scale Computing. - Toshihiro Hanawa; Yuetsu Kodama; Taisuke Boku; Hideharu Amano; Hitoshi Murai; Masayuki Umemura; Mitsuhisa Sato (ARC, 2015)

Improving Strong-Scaling on GPU Cluster Based on Tightly Coupled Accelerators Architecture. - Toshihiro Hanawa; Hisafumi Fujii; Norihisa Fujita; Tetsuya Odajima; Kazuya Matsumoto; Yuetsu Kodama; Taisuke Boku (CLUSTER, 2015)

Implementation of CG Method on GPU Cluster with Proprietary Interconnect TCA for GPU Direct Communication. - Kazuya Matsumoto; Toshihiro Hanawa; Yuetsu Kodama; Hisafumi Fujii; Taisuke Boku (IPDPS Workshops, 2015)

Preliminary Performance Evaluation of Application Kernels Using ARM SVE with Multiple Vector Lengths. - Yuetsu Kodama; Tetsuya Odajima; Motohiko Matsuda; Miwako Tsuji; Jinpil Lee; Mitsuhisa Sato (CLUSTER, 2017)

Power performance analysis of ARM scalable vector extension. - Tetsuya Odajima; Yuetsu Kodama; Mitsuhisa Sato (COOL CHIPS, 2018)

Evaluation of the RIKEN Post-K Processor Simulator. - Yuetsu Kodama; Tetsuya Odajima; Akira Asato; Mitsuhisa Sato (CoRR, 2019)

Evaluation of Power Management Control on the Supercomputer Fugaku. - Yuetsu Kodama; Tetsuya Odajima; Eishi Arima; Mitsuhisa Sato (CLUSTER, 2020)

Performance Evaluation of Supercomputer Fugaku using Breadth-First Search Benchmark in Graph500. - Masahiro Nakao; Koji Ueno; Katsuki Fujisawa; Yuetsu Kodama; Mitsuhisa Sato (CLUSTER, 2020)

Preliminary Performance Evaluation of the Fujitsu A64FX Using HPC Applications. - Tetsuya Odajima; Yuetsu Kodama; Miwako Tsuji; Motohiko Matsuda; Yutaka Maruyama; Mitsuhisa Sato (CLUSTER, 2020)

Accuracy Improvement of Memory System Simulation for Modern Shared Memory Processor. - Yuetsu Kodama; Tetsuya Odajima; Akira Asato; Mitsuhisa Sato (HPC Asia, 2020)

Co-design for A64FX manycore processor and "Fugaku". - Mitsuhisa Sato; Yutaka Ishikawa; Hirofumi Tomita; Yuetsu Kodama; Tetsuya Odajima; Miwako Tsuji; Hisashi Yashiro; Masaki Aoki; Naoyuki Shida; Ikuo Miyoshi; Kouichi Hirai; Atsushi Furuya; et al. (SC, 2020)

The gem5 Simulator: Version 20.0+. - Jason Lowe-Power; Abdul Mutaal Ahmad; Ayaz Akram; Mohammad Alian; Rico Amslinger; Matteo Andreozzi; Adrià Armejach; Nils Asmussen; Srikant Bharadwaj; Gabe Black; Gedare Bloom; Bobby R. Bruce; et al. (CoRR, 2020)

Evaluation of SPEC CPU and SPEC OMP on the A64FX. - Yuetsu Kodama; Masaaki Kondo; Mitsuhisa Sato (CLUSTER, 2021)

Power/Performance/Area Evaluations for Next-Generation HPC Processors using the A64FX Chip. - Eishi Arima; Yuetsu Kodama; Tetsuya Odajima; Miwako Tsuji; Mitsuhisa Sato (COOL CHIPS, 2021)

Performance of the Supercomputer Fugaku for Breadth-First Search in Graph500 Benchmark. - Masahiro Nakao; Koji Ueno; Katsuki Fujisawa; Yuetsu Kodama; Mitsuhisa Sato (ISC, 2021)

Performance and power consumption analysis of Arm Scalable Vector Extension. - Tetsuya Odajima; Yuetsu Kodama; Mitsuhisa Sato (J. Supercomput., 2021)

At the Locus of Performance: A Case Study in Enhancing CPUs with Copious 3D-Stacked Cache. - Jens Domke; Emil Vatai; Balazs Gerofi; Yuetsu Kodama; Mohamed Wahib; Artur Podobas; Sparsh Mittal; Miquel Pericàs; Lingqi Zhang 001; Peng Chen 035; Aleksandr Drozd; Satoshi Matsuoka (CoRR, 2022)

Co-Design and System for the Supercomputer "Fugaku". - Mitsuhisa Sato; Yuetsu Kodama; Miwako Tsuji; Tesuya Odajima (IEEE Micro, 2022)

Evaluation of Performance and Power Consumption on Supercomputer Fugaku Using SPEC HPC Benchmarks. - Yuetsu Kodama; Masaaki Kondo; Mitsuhisa Sato (IEICE Trans. Electron., 2023)

At the Locus of Performance: Quantifying the Effects of Copious 3D-Stacked Cache on HPC Workloads. - Jens Domke; Emil Vatai; Balazs Gerofi; Yuetsu Kodama; Mohamed Wahib; Artur Podobas; Sparsh Mittal; Miquel Pericàs; Lingqi Zhang 001; Peng Chen 035; Aleksandr Drozd; Satoshi Matsuoka (ACM Trans. Archit. Code Optim., 2023)

MCBound: An Online Framework to Characterize and Classify Memory/Compute-bound HPC Jobs. - Francesco Antici; Andrea Bartolini; Zeynep Kiziltan; Özalp Babaoglu; Yuetsu Kodama (SC, 2024)