Reducing memory access latency with asymmetric DRAM bank organizations. - Young Hoon Son; Seongil O; Yuhwan Ro; Jae W. Lee; Jung Ho Ahn (ISCA, 2013)

SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures. - Yuhwan Ro; Hyunyoon Cho; Eojin Lee; Daejin Jung; Young Hoon Son; Jung Ho Ahn; Jae W. Lee (HPCA, 2017)

Understanding power-performance relationship of energy-efficient modern DRAM devices. - Sukhan Lee 002; Yuhwan Ro; Young Hoon Son; Hyunyoon Cho; Nam Sung Kim; Jung Ho Ahn (IISWC, 2017)

SALAD: Achieving Symmetric Access Latency with Asymmetric DRAM Architecture. - Young Hoon Son; Hyunyoon Cho; Yuhwan Ro; Jae W. Lee; Jung Ho Ahn (IEEE Comput. Archit. Lett., 2017)

Selective DRAM cache bypassing for improving bandwidth on DRAM/NVM hybrid main memory systems. - Yuhwan Ro; Min Chul Sung; Yongjun Park 001; Jung Ho Ahn (IEICE Electron. Express, 2017)

Leveraging Power-Performance Relationship of Energy-Efficient Modern DRAM Devices. - Sukhan Lee 002; Hyunyoon Cho; Young Hoon Son; Yuhwan Ro; Nam Sung Kim; Jung Ho Ahn (IEEE Access, 2018)

Enforcing Last-Level Cache Partitioning through Memory Virtual Channels. - Jongwook Chung; Yuhwan Ro; Joonsung Kim; Jaehyung Ahn; Jangwoo Kim; John Kim 001; Jae W. Lee; Jung Ho Ahn (PACT, 2019)

Aquabolt-XL: Samsung HBM2-PIM with in-memory processing for ML accelerators and beyond. - Jin Hyun Kim; Shinhaeng Kang; Sukhan Lee 002; Hyeonsu Kim; Woongjae Song; Yuhwan Ro; Seungwon Lee; David Wang 003; Hyunsung Shin; BengSeng Phuah; Jihyun Choi; Jinin So; et al. (HCS, 2021)

25.4 A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications. - Young-Cheon Kwon; Sukhan Lee 002; Jaehoon Lee 005; Sang-Hyuk Kwon; Je-Min Ryu; Jong-Pil Son; Seongil O; Hak-soo Yu; Haesuk Lee; Soo Young Kim; Youngmin Cho; Jin Guk Kim; et al. (ISSCC, 2021)

Aquabolt-XL HBM2-PIM, LPDDR5-PIM With In-Memory Processing, and AXDIMM With Acceleration Buffer. - Jin Hyun Kim; Shinhaeng Kang; Sukhan Lee 002; Hyeonsu Kim; Yuhwan Ro; Seungwon Lee; David Wang 003; Jihyun Choi; Jinin So; YeonGon Cho; Joon-Ho Song; Jeonghyeon Cho; et al. (IEEE Micro, 2022)

Samsung PIM/PNM for Transfmer Based AI : Energy Efficiency on PIM/PNM Cluster. - Jin Hyun Kim; Yuhwan Ro; Jinin So; Sukhan Lee 002; Shinhaeng Kang; YeonGon Cho; Hyeonsu Kim; Byeongho Kim; Kyungsoo Kim 003; Sangsoo Park; Jin-Seong Kim; Sanghoon Cha; et al. (HCS, 2023)

The Breakthrough Memory Solutions for Improved Performance on LLM Inference. - Byeongho Kim; Sanghoon Cha; Sangsoo Park; Jieun Lee; Sukhan Lee 002; Shinhaeng Kang; Jinin So; Kyungsoo Kim 003; Jin Jung; Jong-Geon Lee; Sunjung Lee; Yoonah Paik; et al. (IEEE Micro, 2024)