Lifetime prediction of channel hot carrier degradation in pMOSFETs separating NBTI component. - Yuichiro Mitani; Shigeto Fukatsu; Daisuke Hagishima; Kazuya Matsuzawa (ICICDT, 2012)

Improvement of gate disturb degradation in SONOS FETs for Vth mismatch compensation in CMOS analog circuits. - Masamichi Suzuki; Atsuhiro Kinoshita; Yuichiro Mitani (ICICDT, 2013)

Time-dependent dielectric breakdown (TDDB) distribution in n-MOSFET with HfSiON gate dielectrics under DC and AC stressing. - Izumi Hirano; Yasushi Nakasaki; Shigeto Fukatsu; Masakazu Goto; Koji Nagatomo; Seiji Inumiya; Katsuyuki Sekine; Yuichiro Mitani; Kikuo Yamabe (Microelectron. Reliab., 2013)

Simple technique for prediction of breakdown voltage of ultrathin gate insulator under ESD testing. - Yuichiro Mitani; Kazuya Matsuzawa (ICICDT, 2015)

Physically unclonable function using initial waveform of ring oscillators on 65 nm CMOS technology. - Tetsufumi Tanamoto; Satoshi Takaya; Nobuaki Sakamoto; Hirotsugu Kasho; Shinichi Yasuda; Takao Marukame; Shinobu Fujita; Yuichiro Mitani (CoRR, 2017)

Mechanism of gate dielectric degradation by hydrogen migration from the cathode interface. - Yusuke Higashi; Riichiro Takaishi; Koichi Kato; Masamichi Suzuki; Yasushi Nakasaki; Mitsuhiro Tomita; Yuichiro Mitani; Masuaki Matsumoto; Shohei Ogura; Katsuyuki Fukutani; Kikuo Yamabe (Microelectron. Reliab., 2017)

Error Tolerance Analysis of Deep Learning Hardware Using a Restricted Boltzmann Machine Toward Low-Power Memory Implementation. - Takao Marukame; Kodai Ueyoshi; Tetsuya Asai; Masato Motomura; Alexandre Schmid; Masamichi Suzuki; Yusuke Higashi; Yuichiro Mitani (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Study on mechanism of thermal curing in ultra-thin gate dielectrics. - Yuichiro Mitani; Yusuke Higashi; Yasushi Nakasaki (IRPS, 2018)

Further Investigation on Mechanism of Trap Level Modulation in Silicon Nitride Films by Fluorine Incorporation. - Harumi Seki; Yasushi Nakasaki; Yuichiro Mitani (IRPS, 2020)

Re-consideration of Correlation between Interface and Bulk Trap Generations using Cryogenic Measurement. - Yuichiro Mitani; Tatsuya Suzuki; Yohei Miyaki (IRPS, 2024)

Re-Consideration of Correlation Between Interface States and Bulk Traps Using Cryogenic Measurement. - Yuichiro Mitani; Tatsuya Suzuki; Yohei Miyaki (ASP-DAC, 2025)