A Data Path Verifier for Register Transfer Level Using Temporal Logic Language Tokio. - Hiroshi Nakamura; Yuji Kukimoto; Masahiro Fujita; Hidehiko Tanaka (CAV (DIMACS/AMS volume), 1990)

Practical design assistance at register transfer level using a data path verifier. - Hiroshi Nakamura; Yuji Kukimoto; Masahiro Fujita; Hidehiko Tanaka (ICCD, 1990)

Application of Boolean Unification to Combinational Logic Synthesis. - Masahiro Fujita; Yutaka Tamiya; Yuji Kukimoto; Kuang-Chien Chen (ICCAD, 1991)

Patching Method for Lookup-Table Type FPLs. - Masahiro Fujita; Yuji Kukimoto (FPL, 1992)

Rectification method for lookup-table type FPGA's. - Yuji Kukimoto; Masahiro Fujita (ICCAD, 1992)

A redesign technique for combinational circuits based on gate reconnections. - Yuji Kukimoto; Masahiro Fujita; Robert K. Brayton (ICCAD, 1994)

VIS: A System for Verification and Synthesis. - Robert K. Brayton; Gary D. Hachtel; Alberto L. Sangiovanni-Vincentelli; Fabio Somenzi; Adnan Aziz; Szu-Tsung Cheng; Stephen A. Edwards; Sunil P. Khatri; Yuji Kukimoto; Abelardo Pardo; Shaz Qadeer; Rajeev K. Ranjan 001; et al. (CAV, 1996)

VIS. - Robert K. Brayton; Gary D. Hachtel; Alberto L. Sangiovanni-Vincentelli; Fabio Somenzi; Adnan Aziz; Szu-Tsung Cheng; Stephen A. Edwards; Sunil P. Khatri; Yuji Kukimoto; Abelardo Pardo; Shaz Qadeer; Rajeev K. Ranjan 001; et al. (FMCAD, 1996)

Exact Required Time Analysis via False Path Detection. - Yuji Kukimoto; Robert K. Brayton (DAC, 1997)

Approximate timing analysis of combinational circuits under the XBD0 model. - Yuji Kukimoto; Wilsin Gosti; Alexander Saldanha; Robert K. Brayton (ICCAD, 1997)

Hierarchical Functional Timing Analysis. - Yuji Kukimoto; Robert K. Brayton (DAC, 1998)

Delay-Optimal Technology Mapping by DAG Covering. - Yuji Kukimoto; Robert K. Brayton; Prashant Sawkar (DAC, 1998)

Combinational Verification based on High-Level Functional Specifications. - Evguenii I. Goldberg; Yuji Kukimoto; Robert K. Brayton (DATE, 1998)

Timing-safe false path removal for combinational modules. - Yuji Kukimoto; Robert K. Brayton (ICCAD, 1999)

Refining switching window by time slots for crosstalk noise calculation. - Pinhong Chen; Yuji Kukimoto; Kurt Keutzer (ICCAD, 2002)

On convergence of switching windows computation in presence of crosstalk noise. - Pinhong Chen; Yuji Kukimoto; Chin-Chi Teng; Kurt Keutzer (ISPD, 2002)

Calibration-Based Differentiable Timing Optimization in Non-linear Global Placement. - Wuxi Li; Yuji Kukimoto; Grégory Servel; Ismail Bustany; Mehrdad E. Dehkordi (ISPD, 2024)