A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling. - Toshihide Fujiyoshi; Shinichiro Shiratake; Shuou Nomura; Tsuyoshi Nishikawa; Yoshiyuki Kitasho; Hideho Arakida; Yuji Okuda; Yoshiro Tsuboi; Mototsugu Hamada; Hiroyuki Hara; Tetsuya Fujita; Fumitoshi Hatori; et al. (IEEE J. Solid State Circuits, 2006)

Design and implementation of scalable, transparent threads for multi-core media processor. - Takeshi Kodaka; Shunsuke Sasaki; Takahiro Tokuyoshi; Ryuichiro Ohyama; Nobuhiro Nonogaki; Koji Kitayama; Tatsuya Mori; Yasuyuki Ueda; Hideho Arakida; Yuji Okuda; Toshiki Kizu; Yoshiro Tsuboi; et al. (DATE, 2009)

A Power, Performance Scalable Eight-Cores Media Processor for Mobile Multimedia Applications. - Tatsuya Mori; Yasuyuki Ueda; Nobuhiro Nonogaki; Toshihiro Terazawa; Milosz Sroka; Tetsuya Fujita; Takeshi Kodaka; Takayuki Mori; Kumiko Morita; Hideho Arakida; Takashi Miura; Yuji Okuda; et al. (IEEE J. Solid State Circuits, 2009)

Spoofing detection for embedded face recognition system using a low cost stereo camera. - Guifen Tian; Tatsuya Mori; Yuji Okuda (ICPR, 2016)