A high-performance processor for optimal ate pairing computation over Barreto-Naehrig curves. - Yujun Xie 001; Bin Wang; Lijun Zhang; Xin Zheng 001; Xiaoling Lin; Xiaoming Xiong; Yuan Liu 022 (IET Circuits Devices Syst., 2022)

A Dual-Core High-Performance Processor for Elliptic Curve Cryptography in GF(p) Over Generic Weierstrass Curves. - Yujun Xie 001; Yuan Liu 022; Xin Zheng 001; Wenhao Zhu; Junxian Li; Jianzhong Li; Shuting Cai; Xiaoming Xiong (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

NIRECP: An ECC Processor Over 256-Bit NIST Prime Field Using New Iterative Reduction. - Yujun Xie 001; Riheng Yan; Bohan Lan; Yuan Liu 022 (Int. J. Circuit Theory Appl., 2025)

FLALM: A Flexible Low Area-Latency Montgomery Modular Multiplication on FPGA. - Yujun Xie 001; Yuan Liu 022; Xin Zheng 001; Bohan Lan; Dengyun Lei; Dehao Xiang; Shuting Cai; Xiaoming Xiong (IEEE Trans. Computers, 2025)

A High-Performance Hardware Accelerator for ECC in GF(p) Over Generic Weierstrass Curves. - Yujun Xie 001; Riheng Yan; Yuan Liu 022; Xin Zheng 001; Shuting Cai; Xiaoming Xiong (IEEE Embed. Syst. Lett., 2025)

An Efficient LUT6-Based Montgomery Modular Multiplication Using Radix-16 Booth Method. - Yujun Xie 001; Yuan Liu 022 (IEEE Trans. Computers, 2025)

Area-Efficient Modular Multiplication on FPGA. - Yujun Xie 001; Yuan Liu 022 (IEEE Trans. Circuits Syst. II Express Briefs, 2025)

A Low Area-Time ECPM Hardware Accelerator Over Curve25519 on FPGA. - Yujun Xie 001; Zhaoyang Ren; Jianlang Lu; Yuan Liu 022 (IEEE Trans. Circuits Syst. I Regul. Pap., 2026)