A next-generation 32-bit VLSI signal processor. - Shingo Tsujimichi; TakaHide Ohkami; Yukihiko Shimazu (ICASSP, 1986)

A macrocell approach for VLSI processor design. - Takeshi Tokuda; Jiro Korematsu; Yukihiko Shimazu; Narumi Sakashita; Tohru Kengaku; Toshiki Fugiyama; Takio Ohno; Osamu Tomisawa (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

Built-in self-test in a 24 bit floating point digital signal processor. - Narumi Sakashita; Hisako Sawai; Eiichi Teraoka; Toshiki Fugiyama; Toru Kengaku; Yukihiko Shimazu; Takeshi Tokuda (ITC, 1990)

A Built-in Self- Test for ADC and DAC in a Single-Chip Speech CODEC. - Eiichi Teraoka; Toru Kengaku; Ikuo Yasui; Kazuyuki Ishikawa; Takahiro Matsuo; Hideyuki Wakada; Narumi Sakashita; Yukihiko Shimazu; Takeshi Tokuda (ITC, 1993)

A 1.71-million transistor CMOS CPU chip with a testable cache architecture. - Yuichi Saito; Yukihiko Shimazu; Tom Shimizu; Kenji Shirai; Isao Fujioka; Yoshitetsu Nishiwaki; Junichi Hinata; Yoshiki Shimotsuma; Masayoshi Sakao (IEEE J. Solid State Circuits, 1993)

Microarchitecture Support for Reducing Branch Penalty in a Supercscaler Processor. - Mamoru Sakamoto; Toyohiko Yoshida; Yasuhiro Nunomura; Yukihiko Shimazu (ICCD, 1996)

A 40GOPS 250mW massively parallel processor based on matrix architecture. - Masami Nakajima; Hideyuki Noda; Katsumi Dosaka; Kiyoshi Nakata; Motoki Higashida; Osamu Yamamoto; Katsuya Mizumoto; Hiroyuki Kondo; Yukihiko Shimazu; Kazutami Arimoto; Kazunori Saitoh; Toru Shimizu (ISSCC, 2006)

The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture. - Hideyuki Noda; Masami Nakajima; Katsumi Dosaka; Kiyoshi Nakata; Motoki Higashida; Osamu Yamamoto; Katsuya Mizumoto; Tetsushi Tanizaki; Takayuki Gyohten; Yoshihiro Okuno; Hiroyuki Kondo; Yukihiko Shimazu; et al. (IEEE J. Solid State Circuits, 2007)

Distributed Hierarchical AI Architecture for Meta-Described Local Dynamic Maps in Autonomous Driving. - Hiroshi Miyata; Kazutami Arimoto; Masatoshi Saitoh; Atsushi Hayami; Hisayoshi Mizuno; Yukihiko Shimazu; Tomoyuki Yokogawa (IIAI-AAI, 2024)