3D graphics LSI core for mobile phone "Z3D". - Masatoshi Kameyama; Yoshiyuki Kato; Hitoshi Fujimoto; Hiroyasu Negishi; Yukio Kodama; Yoshitsugu Inoue; Hiroyuki Kawai (Graphics Hardware, 2003)

A 65nm Single-Chip Application and Dual-Mode Baseband Processor with Partial Clock Activation and IP-MMU. - Masao Naruse; Tatsuya Kamei; Toshihiro Hattori; Takahiro Irita; Kenichi Nitta; Takao Koike; Shinichi Yoshioka; Koji Ohno; Masahito Saigusa; Minoru Sakata; Yukio Kodama; Yuji Arai; et al. (ISSCC, 2008)

A 65 nm Single-Chip Application and Dual-Mode Baseband Processor With Partial Clock Activation and IP-MMU. - Masayuki Ito; Kenichi Nitta; Koji Ohno; Masahito Saigusa; Masaki Nishida; Shinichi Yoshioka; Takahiro Irita; Takao Koike; Tatsuya Kamei; Teruyoshi Komuro; Toshihiro Hattori; Yasuhiro Arai; et al. (IEEE J. Solid State Circuits, 2009)