A 120-Gbit/s 1.27-W 520-mVpp 2: 1 Multiplexer IC Using Self-Aligned InP/InGaAs/InP DHBTs with Emitter Mesa Passivation. - Yutaka Arayashiki; Yukio Ohkubo; Taisuke Matsumoto; Yoshiaki Amano; Akio Takagi; Yutaka Matsuoka (IEICE Trans. Electron., 2010)

High-Bitrate-Measurement-System-Oriented Lower-Jitter 113-Gbit/s 2: 1 Multiplexer and 1: 2 Demultiplexer Modules Using 1-µm InP/InGaAs/InP Double Heterojunction Bipolar Transistors. - Yutaka Arayashiki; Takashi Kamizono; Yukio Ohkubo; Taisuke Matsumoto; Yoshiaki Amano; Yutaka Matsuoka (IEICE Trans. Electron., 2013)