A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder. - Masakazu Suzuoki; Ken Kutaragi; Toshiyuki Hiroi; Hidetaka Magoshi; Shin'ichi Okamoto; Masaaki Oka; Akio Ohba; Yasuyuki Yamamoto; Makoto Furuhashi; Masayoshi Tanaka; Teiji Yutaka; Toyoshi Okada; et al. (IEEE J. Solid State Circuits, 1999)

Repeater insertion method and its application to a 300MHz 128-bit 2-way superscalar microprocessor. - Norman Kojima; Yukiko Parameswar; Christian Klingner; Yukio Ohtaguro; Masataka Matsui; Shigeaki Iwasa; Tatsuo Teruyama; Takayoshi Shimazawa; Hideki Takeda; Kouji Hashizume; Haruyuki Tago; Masaaki Yamada (ASP-DAC, 2000)