Datapath Generator Based on Gate-Level Symbolic Layout. - Nobu Matsumoto; Yoko Watanabe; Kimiyoshi Usami; Yukio Sugeno; Hiroshi Hatada; Shojiro Mori (DAC, 1990)

Hierarchical symbolic design methodology for large-scale data paths. - Kimiyoshi Usami; Yukio Sugeno; Nobu Matsumoto; Shojiro Mori (IEEE J. Solid State Circuits, 1991)

A multiplier-accumulator macro for a 45 MIPS embedded RISC processor. - Hiroalti Murakami; Naoka Yano; Yukio Ootaguro; Yukio Sugeno; Maki Ueno; Yukinori Muroya; Tsuneo Aramaki (IEEE J. Solid State Circuits, 1996)