Design of Multiwave Computing Circuits Based on a Modle of Integrated Opto-Electronic Devices. - Yukio Watanabe; Takafumi Aoki; Tatsuo Higuchi 001 (ISMVL, 1994)

An SPU reference model for simulation, random test generation and verification. - Yukio Watanabe; Balazs Sallay; Brad W. Michael; Daniel A. Brokenshire; Gavin Meil; Hazim Shafi; Daisuke Hiraoka (ASP-DAC, 2006)

The microarchitecture of the synergistic processor for a cell processor. - Brian K. Flachs; Shigehiro Asano; Sang H. Dhong; H. Peter Hofstee; Gilles Gervais; Roy Kim; Tien Le; Peichun Liu; Jens Leenstra; John S. Liberty; Brad W. Michael; Hwa-Joon Oh; et al. (IEEE J. Solid State Circuits, 2006)

Synergistic Processing in Cell's Multicore Architecture. - Michael Gschwind; H. Peter Hofstee; Brian K. Flachs; Martin Hopkins; Yukio Watanabe; Takeshi Yamazaki (IEEE Micro, 2006)

Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI. - Brian K. Flachs; Shigehiro Asano; Sang H. Dhong; H. Peter Hofstee; Gilles Gervais; Roy Kim; Tien Le; Peichun Liu; Jens Leenstra; John S. Liberty; Brad W. Michael; Hwa-Joon Oh; et al. (IBM J. Res. Dev., 2007)