Parallel SOLVE for direct circuit simulation on a transputer array. - Yul Chu; Ausif Mahmood; Donald J. Lynch (HiPC, 1996)

A 2-Way Thrashing-Avoidance Cache (TAC): An Efficient Instruction Cache Scheme for Object-Oriented Languages. - Yul Chu; Mabo Robert Ito (ICCD, 2000)

An Efficient Indirect Branch Predictor. - Yul Chu; Mabo Robert Ito (Euro-Par, 2001)

A Replacement Policy to Save Energy for Data Cache. - Saibhushan Musalappa; Shivakumar Sundaram; Yul Chu (HPCS, 2005)

A Simple Project for Teaching Instruction Set Architecture. - Yul Chu (ICALT, 2005)

A Study for Packet Buffer Algorithms for a Protocol Processor. - Vinod Rajan; Yul Chu (ICITA (1), 2005)

On Achieving Efficiency and Fairness in Video Transportation. - Yan Bai; Yul Chu; Mabo Robert Ito (ICN (1), 2005)

Energy savings for data caches: ELRU-SEQ replacement policy. - Saibhushan Musalappa; Shivakumar Sundaram; Yul Chu (IPCCC, 2005)

An Enhanced Dynamic Packet Buffer Management. - Vinod Rajan; Yul Chu (ISCC, 2005)

A Study for a Dynamic Branch Target-Prefetching Scheme. - Srinivas Damodara; Yul Chu (PDPTA, 2005)

A Shared-Memory Packet Buffer Management in a Network Interface Card. - Amit Uppal; Yul Chu (APNOMS, 2006)

A Case for Dual-Mapping One-Way Caches. - Arul Sandeep Gade; Yul Chu (ARCS, 2006)

A low-power cache scheme for embedded computing. - Yul Chu; Arul Sandeep Gade; Abhishek Bhaduri (J. Embed. Comput., 2006)

Packet Buffer Management for a High-Speed Network Interface Card. - Shalini Batra; Yul Chu; Yan Bai (ICCCN, 2007)

Modeling of Trace- and Block-Based Caches. - Azam Beg; Yul Chu (J. Circuits Syst. Comput., 2007)

A Dynamic Packet Management in a Protocol Processor. - Yul Chu; Amit Uppal; Jae Sok Son (ICCSA (2), 2009)

An Efficient Networking Management for a Protocol Processor. - Yul Chu; Amit Uppal (ICDS, 2009)

A Case for a Packet Management in a Network Terminal. - Yul Chu; Yan Bai; Amit Uppal; Jae Sok Son (NAS, 2009)

A parallel simulator for network terminal packet buffer. - Yul Chu; Jin Hwan Park; Yan Bai; Jae Sok Son; Sanjeev Kumar (Simul., 2012)

A Study for a Low-Power Way Predictor for Embedded Data Caches. - Yul Chu (EMC/HumanCom, 2013)

A Buffered Dual-Access-Mode Scheme Designed for Low-Power Highly-Associative Caches. - Yul Chu; Marven Calagos (Int. J. Embed. Real Time Commun. Syst., 2013)

Dual-access way-prediction cache for embedded systems. - Yul Chu; Jin Hwan Park (EURASIP J. Embed. Syst., 2014)

Accuracy Enhanced Distributed Sparse Matrix Solver with Block-Based Pivoting for Large Linear Systems. - Esteban Torres; Yul Chu; Jin Hwan Park (UIC/ATC/ScalCom, 2015)

A flexible multi-core functional cache simulator (FM-SIM). - Rano Mal; Yul Chu (SummerSim, 2017)

Resource allocation for MEC system with multi-users resource competition based on deep reinforcement learning approach. - Bin Qu; Yan Bai; Yul Chu; Li-e Wang 001; Feng Yu 006; Xianxian Li (Comput. Networks, 2022)