Accurate and High-Speed Asynchronous Network-on-Chip Simulation Using Physical Wire-Delay Information. - Takahiro Hanyu; Yuma Watanabe; Atsushi Matsumoto (ISMVL, 2013)

Energy-aware current-mode inter-chip link for a dependable GALS NoC platform. - Hirokatsu Shirahama; Akira Mochizuki; Yuma Watanabe; Takahiro Hanyu (ISCAS, 2014)

Design of an Energy-Efficient Ternary Current-Mode Intra-Chip Communication Link for an Asynchronous Network-on-Chip. - Akira Mochizuki; Hirokatsu Shirahama; Yuma Watanabe; Takahiro Hanyu (IEICE Trans. Inf. Syst., 2014)