FuMicro: A Fused Microarchitecture Design Integrating In-Order Superscalar and VLIW. - Yumin Hou; Hu He 001; Xu Yang 003; Deyuan Guo; Xu Wang; Jiawei Fu; Keni Qiu (VLSI Design, 2016)

R2D2: Runtime reassurance and detection of A2 Trojan. - Yumin Hou; Hu He 001; Kaveh Shamsi; Yier Jin; Dong Wu; Huaqiang Wu (HOST, 2018)

Hardware and Software Co-Verification from Security Perspective. - Kejun Chen; Qingxu Deng; Yumin Hou; Yier Jin; Xiaolong Guo (MTV, 2019)

Improving ILP via Fused In-Order Superscalar and VLIW Instruction Dispatch Methods. - Yumin Hou; Xu Wang; Jiawei Fu; Junping Ma; Hu He 001; Xu Yang 003 (J. Circuits Syst. Comput., 2019)

A Processing-in-Memory Architecture Programming Paradigm for Wireless Internet-of-Things Applications. - Xu Yang 003; Yumin Hou; Hu He 001 (Sensors, 2019)

CDSP: A Solution for Privacy and Security of Multimedia Information Processing in Industrial Big Data and Internet of Things. - Xu Yang 003; Yumin Hou; Junping Ma; Hu He 001 (Sensors, 2019)

On-Chip Analog Trojan Detection Framework for Microprocessor Trustworthiness. - Yumin Hou; Hu He 001; Kaveh Shamsi; Yier Jin; Dong Wu; Huaqiang Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

WaLo: Security Primitive Generator for RT-Level Logic Locking and Watermarking. - Jun Kuai; Jiaji He; Haocheng Ma; Yiqiang Zhao; Yumin Hou; Yier Jin (AsianHOST, 2020)

A Task-Based Routing Algorithm for Network-on-Chip in Heterogeneous CPU-GPU Architectures. - Juan Fang; Zhichao Wei; Yaqi Liu; Yumin Hou (HPCC/DSS/SmartCity/DependSys, 2023)

TB-TBP: a task-based adaptive routing algorithm for network-on-chip in heterogenous CPU-GPU architectures. - Juan Fang; Zhichao Wei; Yaqi Liu; Yumin Hou (J. Supercomput., 2024)

Reinforcement Learning-Driven Adaptive Prefetch Aggressiveness Control for Enhanced Performance in Parallel System Architectures. - Huijing Yang; Juan Fang; Yumin Hou; Xing Su 001; Neal N. Xiong (IEEE Trans. Parallel Distributed Syst., 2025)