Enhanced IEEE 1500 test wrapper for testing small RAMs in SOCs. - Yu-Jen Huang; Yun-Chao You; Jin-Fu Li 001 (SoCC, 2010)

A built-in self-test scheme for 3D RAMs. - Yun-Chao You; Che-Wei Chou; Jin-Fu Li 001; Chih-Yen Lo; Ding-Ming Kwai; Yung-Fa Chou; Cheng-Wen Wu (ITC, 2012)

A hybrid ECC and redundancy technique for reducing refresh power of DRAMs. - Yun-Chao You; Chih-Sheng Hou; Li-Jung Chang; Jin-Fu Li 001; Chih-Yen Lo; Ding-Ming Kwai; Yung-Fa Chou; Cheng-Wen Wu (VTS, 2013)

BIST-Assisted Tuning Scheme for Minimizing IO-Channel Power of TSV-Based 3D DRAMs. - Yun-Chao You; Chi-Chun Yang; Jin-Fu Li 001; Chih-Yen Lo; Chao-Hsun Chen; Jenn-Shiang Lai; Ding-Ming Kwai; Yung-Fa Chou; Cheng-Wen Wu (ATS, 2014)