Yun Chen

Orcid: 0000-0002-3736-9456

Affiliations:
  • Fudan University, Department of Microelectronics, ASIC and System State Key Laboratory, Shanghai, China (PhD 2007)


According to our database1, Yun Chen authored at least 61 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
RIS-ADMM: A RIS and ADMM-Based Passive and Sparse Sensing Method With Interference Removal.
IEEE Commun. Lett., April, 2024

2023
Real-Time Demonstration of a Low-complexity PS Scheme for 130Gb/s WDM-OFDM-PON.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2023

Experimental Demonstration of a 96 Channel WDM-FSO System Based Mobile Fronthaul with 1024QAM Delta-Sigma-Modulation.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2023

2022
Safety Assurance System for Electric Vehicles Based on Infrared LiDAR.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A Low-latency Carrier Phase Recovery Hardware for Coherent Optical Communication.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A Low-latency Multi-format Carrier Phase Recovery Hardware for Coherent Optical Communication.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

An Approximate-Computing-Based Adaptive Equalizer for Polarization Mode Dispersion.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021
A low-power twiddle factor addressing architecture for split-radix FFT processor.
Microelectron. J., 2021

2020
A High-Performance Stochastic LDPC Decoder Architecture Designed via Correlation Analysis.
IEEE Trans. Circuits Syst., 2020

2019
Hybrid Preconditioned CG Detection with Sequential Update for Massive MIMO Systems.
Proceedings of the 2019 IEEE International Workshop on Signal Processing Systems, 2019

Acoustic Frequency Division Based on Active Metamaterial: An Experimental Demonstration of Acoustic Frequency Halving.
Proceedings of the IoT as a Service - 5th EAI International Conference, 2019

A 3.01 mm<sup>2</sup> 65.38Gb/s Stochastic LDPC Decoder for IEEE 802.3an in 65 nm.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

High throughput multi-code LDPC encoder for CCSDS standard.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018
Multi-mode Study of Deep Learning Applications in Acoustic Signal Processing.
Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018

A High-Throughput QC-LDPC Decoder for Near-Earth Application.
Proceedings of the 23rd IEEE International Conference on Digital Signal Processing, 2018

2017
Implementation of a pipeline division-free MMSE MIMO detector that support soft-input and soft-output.
Proceedings of the 23rd Asia-Pacific Conference on Communications, 2017

2016
Strategies for Reducing Decoding Cycles in Stochastic LDPC Decoders.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

Convergence-optimized variable node structure for stochastic LDPC decoder.
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016

2015
EM independent Gaussian approximate message passing and its application in OFDM impulsive noise mitigation.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

An implementation of turbo equalization using cyclic prefix in LTE downlink system.
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015

Latency-optimized stochastic LDPC decoder for high-throughput applications.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

An area-efficient architecture for stochastic LDPC decoder.
Proceedings of the 2015 IEEE International Conference on Digital Signal Processing, 2015

OFDM synchronization implementation based on Chisel platform for 5G research.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
An Efficient Multirate LDPC-CC Decoder With a Layered Decoding Algorithm for the IEEE 1901 Standard.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

Efficient symbol reliability based decoding for QCNB-LDPC codes.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A low-complexity LDPC decoder for NAND flash applications.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Accurate Sampling Timing Acquisition for Baseband OFDM Power-Line Communication in Non-Gaussian Noise.
IEEE Trans. Commun., 2013

A 1.5 Gb/s Highly Parallel Turbo Decoder for 3GPP LTE/LTE-Advanced.
IEICE Trans. Commun., 2013

Fine residual carrier frequency and sampling frequency estimation in wireless OFDM systems.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Algorithm and VLSI architecture of channel estimation impaired by impulsive noise in PLC.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Memory efficient EMS decoding for non-binary LDPC codes.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

An efficient multi-rate LDPC-CC decoder with layered decoding algorithm.
Proceedings of IEEE International Conference on Communications, 2013

A high-throughput LDPC decoder for optical communication.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

Positionable wearable fall detection system for elderly assisted living applications.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012
An Area-Efficient Reconfigurable LDPC Decoder with Conflict Resolution.
IEICE Trans. Electron., 2012

A Flexible LDPC Decoder Architecture Supporting TPMP and TDMP Decoding Algorithms.
IEICE Trans. Inf. Syst., 2012

A Fully Programmable Reed-Solomon Decoder on a Multi-Core Processor Platform.
IEICE Trans. Inf. Syst., 2012

Efficient Implementation of OFDM Inner Receiver on a Programmable Multi-Core Processor Platform.
IEICE Trans. Commun., 2012

A Flexible Architecture for TURBO and LDPC Codes.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012

Fine Residual Carrier Frequency and Sampling Frequency Estimation in Wireless OFDM Systems
CoRR, 2012

A low-cost architecture for multi-mode Reed-Solomon decoder.
Proceedings of the International SoC Design Conference, 2012

A multi-core mapping implementation of 3780-point FFT.
Proceedings of the International SoC Design Conference, 2012

An improved coarse synchronization scheme in 3GPP LTE downlink OFDM systems.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 60mW baseband SoC for CMMB receiver.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

A single-routing layered LDPC decoder for 10Gbase-T Ethernet in 130nm CMOS.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
Efficient Iterative Frequency Domain Equalization for Single Carrier System with Insufficient Cyclic Prefix.
IEICE Trans. Commun., 2011

A common flexible architecture for Turbo/LDPC codes.
Proceedings of the International SoC Design Conference, 2011

Flexible and efficient FEC decoders supporting multiple transmission standards.
Proceedings of the International SoC Design Conference, 2011

A channel estimation scheme for Chinese DTTB system combating long echo and high doppler shift.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A 4.32 mm<sup>2</sup> 170mW LDPC decoder in 0.13μm CMOS for WiMax/Wi-Fi applications.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

A hardware accelerator for speech recognition applications.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A robust frame synchronization scheme for Broadband Power-line Communication.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

An area-Efficient LDPC decoder for multi-standard with conflict resolution.
Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011

2010
Low cost VLSI architecture of resisting long echo channel estimation for DTMB system.
IEEE Trans. Consumer Electron., 2010

Programmable Architecture for Flexi-Mode QC-LDPC Decoder Supporting Wireless LAN/MAN Applications and Beyond.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

A Cost-Efficient LDPC Decoder for DVB-S2 with the Solution to Address Conflict Issue.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

A 128/256-point pipeline FFT/IFFT processor for MIMO OFDM system IEEE 802.16e.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A flexible LDPC decoder architecture supporting two decoding algorithms.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2008
Low-cost reconfigurable VLSI architecture for fast fourier transform.
IEEE Trans. Consumer Electron., 2008

2007
Robust Timing and Frequency Synchronization Scheme for DTMB System.
IEEE Trans. Consumer Electron., 2007

A Novel Five-Point Algorithm of Phase Noise Cancellation in DTMB.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007


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