Coverage Driven Verification Methodology for Asynchronous Neuromorphic Routers. - Yun Kwan Lee; Vishnu P. Nambiar; Junran Pu; Wang Ling Goh; Anh-Tuan Do (SoCC, 2019)

0.5V 4.8 pJ/SOP 0.93µW Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron. - Vishnu P. Nambiar; Junran Pu; Yun Kwan Lee; Aarthy Mani; Tao Luo 014; L. Yang; Eng-Kiat Koh; Ming Ming Wong; Fei Li 015; Wang Ling Goh; Anh Tuan Do (A-SSCC, 2020)

Post-Silicon Validation Methodology for Resource-Constrained Neuromorphic Hardware. - Yun Kwan Lee; Vishnu P. Nambiar; Kim Seng Goh; Anh Tuan Do (IECON, 2020)

A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDP. - Ming Ming Wong; S. B. Shrestha; Vishnu P. Nambiar; Aarthy Mani; Yun Kwan Lee; Eng-Kiat Koh; W. Jiang; Kevin Tshun Chuan Chai; Anh-Tuan Do (ESSDERC, 2021)

Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design. - Vishnu P. Nambiar; Junran Pu; Yun Kwan Lee; Aarthy Mani; Eng-Kiat Koh; Ming Ming Wong; Fei Li 015; Wang Ling Goh; Anh Tuan Do (IEEE Trans. Circuits Syst. II Express Briefs, 2021)