High-performance architecture for dynamically updatable packet classification on FPGA. - Yun Rock Qu; Shijie Zhou 001; Viktor K. Prasanna (ANCS, 2013)

Fast dynamically updatable packet classifier on FPGA. - Yun Rock Qu; Viktor K. Prasanna (FPL, 2013)

Scalable and dynamically updatable lookup engine for decision-trees on FPGA. - Yun Rock Qu; Viktor K. Prasanna (HPEC, 2014)

Performance modeling and optimizations for decomposition-based large-scale packet classification on multi-core processors. - Yun Rock Qu; Shijie Zhou 001; Viktor K. Prasanna (HPSR, 2014)

High-throughput traffic classification on multi-core processors. - Da Tong; Yun Rock Qu; Viktor K. Prasanna (HPSR, 2014)

High-throughput hash-based online traffic classification engines on FPGA. - Vaibhav R. Gandhi; Yun Rock Qu; Viktor K. Prasanna (ReConFig, 2014)

Compact Hash Tables for High-Performance Traffic Classification on Multi-core Processors. - Yun Rock Qu; Viktor K. Prasanna (SBAC-PAD, 2014)

Multi-core implementation of decomposition-based packet classification algorithms. - Shijie Zhou 001; Yun Rock Qu; Viktor K. Prasanna (J. Supercomput., 2014)

Optimizing Many-field Packet Classification on FPGA, Multi-core General Purpose Processor, and GPU. - Yun Rock Qu; Hao H. Zhang; Shijie Zhou 001; Viktor K. Prasanna (ANCS, 2015)

Large-scale packet classification on FPGA. - Shijie Zhou 001; Yun Rock Qu; Viktor K. Prasanna (ASAP, 2015)

Enabling High Throughput and Virtualization for Traffic Classification on FPGA. - Yun Rock Qu; Viktor K. Prasanna (FCCM, 2015)

Power-efficient range-match-based packet classification on FPGA. - Yun Rock Qu; Viktor K. Prasanna (FPL, 2015)

A Decomposition-Based Approach for Scalable Many-Field Packet Classification on Multi-core Processors. - Yun Rock Qu; Shijie Zhou 001; Viktor K. Prasanna (Int. J. Parallel Program., 2015)

Packet Classification on Multi-core Platforms. - Yun Rock Qu; Shijie Zhou 001; Viktor K. Prasanna (Handbook on Data Centers, 2015)

Compact hash tables for decision-trees. - Yun Rock Qu; Viktor K. Prasanna (Parallel Comput., 2016)

High-Performance and Dynamically Updatable Packet Classification Engine on FPGA. - Yun Rock Qu; Viktor K. Prasanna (IEEE Trans. Parallel Distributed Syst., 2016)

Fast Online Set Intersection for Network Processing on FPGA. - Yun Rock Qu; Viktor K. Prasanna (IEEE Trans. Parallel Distributed Syst., 2016)

Accelerating Decision Tree Based Traffic Classification on FPGA and Multicore Platforms. - Da Tong; Yun Rock Qu; Viktor K. Prasanna (IEEE Trans. Parallel Distributed Syst., 2017)