An 1-bit by 1-bit High Parallelism In-RRAM Macro with Co-Training Mechanism for DCNN Applications. - Chi Liu; Shao-Tzu Li; Tong-Lin Pan; Cheng-En Ni; Yun Sung; Chia-Lin Hu; Kang-Yu Chang; Tuo-Hung Hou; Tian-Sheuan Chang; Shyh-Jye Jou (VLSI-DAT, 2022)

Hardware-Robust In-RRAM-Computing for Object Detection. - Yu-Hsiang Chiang; Cheng-En Ni; Yun Sung; Tuo-Hung Hou; Tian-Sheuan Chang; Shyh-Jye Jou (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)