A multi-class preemptive priority cognitive radio system with random interruption discipline. - Yunbo Huang; Jinting Wang (QTNA, 2010)

A discrete-time on-off source queueing system with negative customers. - Jinting Wang; Yunbo Huang; Zhangmin Dai (Comput. Ind. Eng., 2011)

Constant voltage stress characterization of nFinFET transistor during total ionizing dose experiment. - Binhong Li; Yang Huang 002; Jianfei Wu; Yunbo Huang; Bo Li 051; Qingzhu Zhang; Ling Yang; Fayu Wan; Jiajun Luo; Zhengsheng Han; Huaxiang Yin (Microelectron. Reliab., 2018)

Process variation dependence of total ionizing dose effects in bulk nFinFETs. - Bo Li 051; Yunbo Huang; Ling Yang; Qingzhu Zhang; Zhongshan Zheng; Binhong Li; Huiping Zhu; Jianhui Bu; Huaxiang Yin; Jiajun Luo; Zhengsheng Han; Haibin Wang (Microelectron. Reliab., 2018)

A 3.3-mW 25.2-to-29.4-GHz Current-Reuse VCO Using a Single-Turn Multi-Tap Inductor and Differential-Only Switched-Capacitor Arrays With a 187.6-dBc/Hz FOM. - Yunbo Huang; Yong Chen 005; Hao Guo; Pui-In Mak; Rui Paulo Martins (IEEE Trans. Circuits Syst., 2020)

A 3.52-GHz Harmonic-Rich-Shaping VCO with Noise Suppression and Circulation, Achieving -151-dBc/Hz Phase Noise at 10-MHz Offset. - Yunbo Huang; Yong Chen 005; Pui-In Mak; Rui Paulo Martins (ISCAS, 2021)

A 3.36-GHz Locking-Tuned Type-I Sampling PLL With -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques. - Yunbo Huang; Yong Chen 005; Hailong Jiao; Pui-In Mak; Rui Paulo Martins (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A 9.97-GHz 190.6-dBc/Hz FOM CMOS VCO Featuring Nested Common-Mode Resonator and Intrinsic Differential 2nd-Harmonic Output. - Yunbo Huang; Yong Chen 005; Chaowei Yang; Pui-In Mak; Rui Paulo Martins (ISCAS, 2023)

An 83.3-to-104.7GHz Harmonic-Extraction VCO Incorporating Multi-Resonance, Multi-Core, and Multi-Mode (3M) Techniques Achieving -124dBc/Hz Absolute PN and 190.7dBc/Hz $ text{FoM}_{ mathrm{T}}$. - Hao Guo; Yong Chen 005; Yunbo Huang; Pui-In Mak; Rui Paulo Martins (ISSCC, 2023)

AAIA: an efficient aggregation scheme against inverting attack for federated learning. - Zhen Yang 004; Shisong Yang; Yunbo Huang; José-Fernán Martínez; Lourdes López-Santidrián; Yuwen Chen 002 (Int. J. Inf. Sec., 2023)

A 3.6-GHz Type-II Sampling PLL With a Differential Parallel-Series Double-Edge S-PD Scoring 43.1-fsRMSJitter, -258.7-dB FOM, and -75.17-dBc Reference Spur. - Yunbo Huang; Yong Chen 005; Bo Zhao 003; Pui-In Mak; Rui Paulo Martins (IEEE Trans. Very Large Scale Integr. Syst., 2023)

A 3.78-GHz Type-I Sampling PLL With a Fully Passive KPD-Doubled Primary-Secondary S-PD Measuring 39.6-fsRMS Jitter, -260.2-dB FOM, and -70.96-dBc Reference Spur. - Yunbo Huang; Yong Chen 005; Bo Zhao 003; Pui-In Mak; Rui Paulo Martins (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Universal Stability Criterion for Type-I Sampling Phase-Locked Loops. - Yunbo Huang; Yong Chen 005; Pui-In Mak; Rui Paulo Martins (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A 28-nm 368-fJ/Cycle, 0.43%/V Supply-Sensitivity, FLL-Based RC Oscillator Featuring Positive-TC-Only Resistors and ΔΣM-Based Trimming. - Yunbo Huang; Yong Chen 005; Kaiyuan Yang 001; Paolo Crovetti; Pui-In Mak; Rui Paulo Martins (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

7.4 A 0.027mm2 5.6-7.8GHz Ring-Oscillator-Based Ping-Pong Sampling PLL Scoring 220.3fsrms Jitter and -74.2dBc Reference Spur. - Yunbo Huang; Yong Chen 005; Zunsong Yang; Rui Paulo Martins; Pui-In Mak (ISSCC, 2024)

A 6.5-to-6.9-GHz SSPLL with Configurable Differential Dual-Edge SSPD Achieving 44-fs RMS Jitter, -260.7-dB FOMJitter, and -76.5-dBc Reference Spur. - Tianle Chen; Hongyu Ren; Zunsong Yang; Yunbo Huang; Xianghe Meng; Weiwei Yan; Weidong Zhang; Xuqiang Zheng; Xuan Guo; Tetsuya Iizuka; Pui-In Mak; Yong Chen 005; et al. (VLSI Technology and Circuits, 2024)

Batch data recovery from gradients based on generative adversarial networks. - Yunbo Huang; Yuwen Chen 002; José-Fernán Martí-nez-Ortega; Haiyang Yu 001; Zhen Yang 004 (Neural Comput. Appl., 2024)

A 22.4-25.6GHz Ping-Pong Sub-Sampling PLL Featuring Unified Supply Voltage and Balanced 2nd Harmonic Extraction Achieving 45.8fsrms Jitter and -254.3dB FoM. - Yunbo Huang; Zunsong Yang; Hongyu Ren; Rui Paulo Martins; Yan Lu 002; Nan Sun 001; Nan Qi; Yong Chen 005 (CICC, 2025)