Efficient synthesis of approximate threshold logic circuits with an error rate guarantee. - Yung-An Lai; Chia-Chun Lin; Chia-Cheng Wu; Yung-Chih Chen; Chun-Yao Wang (DATE, 2018)

A Hybrid Approach to Equivalent Fault Identification for Verification Environment Qualification. - Chia-Cheng Wu; Tung-Yuan Lee; Yung-An Lai; Hsin-Pei Wang; De-Xuan Ji; Yan-Ping Chang; Teng-Chia Wang; Chin-Heng Liu; Chun-Yao Wang; Yung-Chih Chen (ACM Great Lakes Symposium on VLSI, 2018)