A software coherence scheme with the assistance of directories. - Yung-Chin Chen; Alexander V. Veidenbaum (ICS, 1991)

Comparison and analysis of software and directory coherence schemes. - Yung-Chin Chen; Alexander V. Veidenbaum (SC, 1991)

An Effective Write Policy for Software Coherence Schemes. - Yung-Chin Chen; Alexander V. Veidenbaum (SC, 1992)

Performance Evaluation of Memory Caches in Multiprocessors. - Yung-Chin Chen; Alexander V. Veidenbaum (ICPP (1), 1993)

Cache Design and Performance in a Large-Scale Shared-Memory Multiprocessor System - Yung-Chin Chen (1993)

HALO-CAT: A Hidden Network Processor with Activation-Localized CIM Architecture and Layer-Penetrative Tiling. - Yung-Chin Chen; Shimpei Ando; Daichi Fujiki; Shinya Takamaeda-Yamazaki; Kentaro Yoshioka (CoRR, 2023)

OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration. - Yung-Chin Chen; Shimpei Ando; Daichi Fujiki; Shinya Takamaeda-Yamazaki; Kentaro Yoshioka (ASPDAC, 2024)

PACiM: A Sparsity-Centric Hybrid Compute-in-Memory Architecture via Probabilistic Approximation. - Wenlun Zhang; Shimpei Ando; Yung-Chin Chen; Satomi Miyagi; Shinya Takamaeda-Yamazaki; Kentaro Yoshioka (ICCAD, 2024)

A Review of SRAM-based Compute-in-Memory Circuits. - Kentaro Yoshioka; Shimpei Ando; Satomi Miyagi; Yung-Chin Chen; Wenlun Zhang (CoRR, 2024)

ASiM: Improving Transparency of SRAM-based Analog Compute-in-Memory Research with an Open-Source Simulation Framework. - Wenlun Zhang; Shimpei Ando; Yung-Chin Chen; Kentaro Yoshioka (CoRR, 2024)