A disturb-alleviation scheme for 3D flash memory. - Yu-Ming Chang; Yuan-Hao Chang 001; Tei-Wei Kuo; Hsiang-Pang Li; Yung-Chun Li (ICCAD, 2013)

Achieving SLC performance with MLC flash memory. - Yu-Ming Chang; Yuan-Hao Chang 001; Tei-Wei Kuo; Yung-Chun Li; Hsiang-Pang Li (DAC, 2015)

On Relaxing Page Program Disturbance over 3D MLC Flash Memory. - Yu-Ming Chang; Yung-Chun Li; Yuan-Hao Chang 001; Tei-Wei Kuo; Chih-Chang Hsieh; Hsiang-Pang Li (ICCAD, 2015)

Realizing erase-free SLC flash memory with rewritable programming design. - Yu-Ming Chang; Yung-Chun Li; Ping-Hsien Lin; Hsiang-Pang Li; Yuan-Hao Chang 001 (CODES+ISSS, 2016)

Disturbance Relaxation for 3D Flash Memory. - Yu-Ming Chang; Yuan-Hao Chang 001; Tei-Wei Kuo; Yung-Chun Li; Hsiang-Pang Li (IEEE Trans. Computers, 2016)

Achieving defect-free multilevel 3D flash memories with one-shot program design. - Chien-Chung Ho; Yung-Chun Li; Yuan-Hao Chang 001; Yu-Ming Chang (DAC, 2018)

Achieving fast sanitization with zero live data copy for MLC flash memory. - Ping-Hsien Lin; Yu-Ming Chang; Yung-Chun Li; Wei-Chen Wang 002; Chien-Chung Ho; Yuan-Hao Chang 001 (ICCAD, 2018)

A Stride-Away Programming Scheme to Resolve Crash Recoverability and Data Readability Issues of Multi-Level-Cell Flash Memory. - Chien-Chung Ho; Yung-Chun Li; Ping-Hsien Lin; Wei-Chen Wang 002; Yuan-Hao Chang 001 (NVMSA, 2018)

Toward Instantaneous Sanitization through Disturbance-induced Errors and Recycling Programming over 3D Flash Memory. - Wei-Chen Wang 002; Ping-Hsien Lin; Yung-Chun Li; Chien-Chung Ho; Yu-Ming Chang; Yuan-Hao Chang 001 (ICCAD, 2019)

Approximate Programming Design for Enhancing Energy, Endurance and Performance of Neural Network Training on NVM-based Systems. - Chien-Chung Ho; Wei-Chen Wang 002; Te-Hao Hsu; Zhi-Duan Jiang; Yung-Chun Li (NVMSA, 2021)

RAM: exploiting restrained and approximate management for enabling neural network training on NVM-based systems. - Chien-Chung Ho; Wei-Chen Wang 002; Szu-Yu Chen; Yung-Chun Li; Kun-Chi Chiang (SAC, 2022)

In-Memory Approximate Computing Architecture Based on 3D-NAND Flash Memories. - Po-Hao Tseng; Yu-Hsuan Lin; Feng-Ming Lee; Tian-Cig Bo; Yung-Chun Li; Ming-Hsiu Lee; Kuang-Yeu Hsieh; Keh-Chung Wang; Chih-Yuan Lu (VLSI Technology and Circuits, 2022)

Efficient Sanitization Design for LSM-based Key-Value Store over 3D MLC NAND Flash. - Liang-Chi Chen; Shu-Qi Yu; Chien-Chung Ho; Wei-Chen Wang 002; Yung-Chun Li (SAC, 2023)

Chip Demonstration of a High-Density (43Gb) and High-Search-Bandwidth (300Gb/s) 3D NAND Based In-Memory Search Accelerator for Ternary Content Addressable Memory (TCAM) and Proximity Search of Hamming Distance. - Chih-Chang Hsieh; Hang-Ting Lue; Yung-Chun Li; Shuo-Nan Hung; Chun-Hsiung Hung; Keh-Chung Wang; Chih-Yuan Lu (VLSI Technology and Circuits, 2023)

Reaping Both Latency and Reliability Benefits With Elaborate Sanitization Design for 3D TLC NAND Flash. - Wei-Chen Wang 002; Chien-Chung Ho; Yung-Chun Li; Liang-Chi Chen; Yu-Ming Chang (IEEE Trans. Computers, 2023)

On Enhancing Data Integrity with Low-cost Retention-Refillable Programming Scheme. - Kun-Chi Chiang; Yung-Chun Li; Wei-Chen Wang 002; Wei-Kuan Shih (SAC, 2024)