A 9.87 nW 1 kS/s 8.7 ENOB SAR ADC for implantable epileptic seizure detection microsystems. - Anh-Tuan Do; Chun Kit Lam; Yung Sern Tan; Kiat Seng Yeo; Jia Hao Cheong; Lei Yao; Meng Tong Tan; Minkyu Je (APCCAS, 2012)

Integrated circuits design for neural recording sensor interface. - Xiaodan Zou; Lei Liu; Yung Sern Tan; Minkyu Je; Kiat Seng Yeo (APCCAS, 2012)

Low power implantable neural recording front-end. - Anh-Tuan Do; Yung Sern Tan; Chun Kit Lam; Minkyu Je; Kiat Seng Yeo (ISOCC, 2012)

A 57∼66GHz CMOS voltage-controlled oscillator using tunable differential inductor. - Haitao Wang; Kiat Seng Yeo; Anh-Tuan Do; Yung Sern Tan; Kai Kang; Zhenghao Lu (ISOCC, 2012)

A 160 nW 25 kS/s 9-bit SAR ADC for neural signal recording applications. - Anh-Tuan Do; Chun Kit Lam; Yung Sern Tan; Kiat Seng Yeo; Jia Hao Cheong; Xiaodan Zou; Lei Yao; Kuang-Wei Cheng; Minkyu Je (NEWCAS, 2012)

A Dual-Loop Clock and Data Recovery Circuit With Compact Quarter-Rate CMOS Linear Phase Detector. - Yung Sern Tan; Kiat Seng Yeo; Chirn Chye Boon; Manh Anh Do (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

A current-mode stimulator circuit with two-step charge balancing background calibration. - Anh-Tuan Do; Yung Sern Tan; Gordon M. Xiong; Cleo Choong; Zhi-Hui Kong; Kiat Seng Yeo (ISCAS, 2013)

A low power wideband differential transimpedance amplifier for optical receivers in 0.18-μm CMOS. - Whye Seng Chong; Yung Sern Tan; Kiat Seng Yeo (NEWCAS, 2013)

An inductorless transimpedance amplifier design for 10 Gb/s optical communication using 0.18-µm CMOS. - Bai Song Samuel Lee; Yung Sern Tan; Bharatha Kumar Thangarasu; Kiat Seng Yeo; Zhichao Li; Xiaopeng Yu 002 (ISIC, 2016)