Ultra-Low-Latency and Flexible In-memory Key-Value Store System Design on CPU-FPGA. - Yunhui Qiu; Hankun Lv; Jinyu Xie; Wenbo Yin; Lingli Wang (FPT, 2018)

A Low-Latency Multi-Version Key-Value Store Using B-Tree on an FPGA-CPU Platform. - Yuchen Ren; Zhijian Liao; Xiaozhong Shi; Jinyu Xie; Yunhui Qiu; Hankun Lv; Wenbo Yin; Lingli Wang; Bowei Yu; Hua Chen; Xianjun He (FPL, 2019)

High-Throughput and Low-Latency Distributed Management Proxy for Key-Value Store Over 100Gbps Ethernet on FPGA. - Jinyu Xie; Yunhui Qiu; Wenbo Yin; Lingli Wang (FPT, 2019)

High Throughput and Low Latency Multi-Version Management Key-Value Storage Accelerator. - Hankun Lv; Yuchen Ren; Yunhui Qiu; Wenbo Yin; Lingli Wang (FPT, 2020)

FULL-KV: Flexible and Ultra-Low-Latency In-Memory Key-Value Store System Design on CPU-FPGA. - Yunhui Qiu; Jinyu Xie; Hankun Lv; Wenbo Yin; Wai-Shing Luk; Lingli Wang; Bowei Yu; Hua Chen; Xianjun Ge; Zhijian Liao; Xiaozhong Shi (IEEE Trans. Parallel Distributed Syst., 2020)

A High-performance Open-channel Open-way NAND Flash Controller Architecture. - Yunhui Qiu; Wenbo Yin; Lingli Wang (FPL, 2021)

TRAM: An Open-Source Template-based Reconfigurable Architecture Modeling Framework. - Yunhui Qiu; Yuhang Cao; Yuan Dai; Wenbo Yin; Lingli Wang (FPL, 2022)

A High-Performance and Scalable NVMe Controller Featuring Hardware Acceleration. - Yunhui Qiu; Wenbo Yin; Lingli Wang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

An Automatic Optimization Method of Combinational Logic Loops in CGRA. - Mingyang Chen; Yunhui Qiu; Kaixiang Zhu; Lingli Wang (ASICON, 2023)

UPTRA: An Ultra-Parameterized Temporal CGRA Modeling and Optimization. - Yuan Dai; Yunhui Qiu; Qilong Zhu; Jingyuan Li 003; Wenbo Yin; Lingli Wang (FCCM, 2023)

PRAD: A Bayesian Optimization-based DSE Framework for Parameterized Reconfigurable Architecture Design. - Bingbing Peng; Shaoyang Sun; Yuan Dai; Jingyuan Li 003; Yunhui Qiu; Kaihang Wang; Wenbo Yin; Lingli Wang (FCCM, 2023)

E2-ACE: An Energy-Efficient Reconfigurable Crypto-Accelerator with Agile End-to-End Toolchain. - Yuhang Cao; Yunhui Qiu; Xuchen Gao; Qilong Zhu; Wenbo Yin; Lingli Wang (ICFPT, 2023)

A Dynamic Partial Reconfigurable CGRA Framework for Multi-Kernel Applications. - Qilong Zhu; Yuhang Cao; Yunhui Qiu; Xuchen Gao; Wenbo Yin; Lingli Wang (ICFPT, 2023)

THRAM: A Template-based Heterogeneous CGRA Modeling Framework Supporting Fast DSE. - Jingyuan Li 003; Yunhui Qiu; Guowei Zhu; Qilong Zhu; Wenbo Yin; Lingli Wang (ISCAS, 2023)

A CGRA Front-end Compiler Enabling Extraction of General Control and Dedicated Operators. - Xuchen Gao; Yunhui Qiu; Yuan Dai; Wenbo Yin; Lingli Wang (ASPDAC, 2024)

An Agile Deploying Approach for Large-Scale Workloads on CGRA-CPU Architecture. - Jiahang Lou; Xuchen Gao; Yiqing Mao; Yunhui Qiu; Yihan Hu 003; Wenbo Yin; Lingli Wang (DATE, 2024)

CFEACT: A CGRA-based Framework Enabling Agile CNN and Transformer Accelerator Design. - Yiqing Mao; Xuchen Gao; Jiahang Lou; Yunhui Qiu; Wenbo Yin; Wai-Shing Luk; Lingli Wang (FPL, 2024)

FDRA: A Framework for a Dynamically Reconfigurable Accelerator Supporting Multi-Level Parallelism. - Yunhui Qiu; Yiqing Mao; Xuchen Gao; Sichao Chen; Jiangnan Li; Wenbo Yin; Lingli Wang (ACM Trans. Reconfigurable Technol. Syst., 2024)

HETA: A Heterogeneous Temporal CGRA Modeling and Design Space Exploration via Bayesian Optimization. - Yuan Dai; Jingyuan Li 003; Qilong Zhu; Yunhui Qiu; Yihan Hu 003; Wenbo Yin; Lingli Wang (IEEE Trans. Very Large Scale Integr. Syst., 2024)

COFFA: A Co-Design Framework for Fused-Grained Reconfigurable Architecture Towards Efficient Irregular Loop Handling. - Yuan Dai; Xuchen Gao; Yunhui Qiu; Jingyuan Li 003; Yuhang Cao; Yiqing Mao; Sichao Chen; Wenbo Yin; Wai-Shing Luk; Lingli Wang (IEEE Trans. Computers, 2025)