A Compact Q-Learning-Based Standard Cell Layout Compiler for 3nm GAAFET and Beyond. - MinSeung Shin; Jongbeom Kim; Yunjeong Shin; Taigon Song (ISOCC, 2023)

Reinforcement Learning-Based Optimization of Back-Side Power Delivery Networks in VLSI Design for IR -Drop Reduction. - Seungmin Woo; Hyunsoo Lee; Yunjeong Shin; MinSeok Han; Yunjeong Go; Jongbeom Kim; Hyundong Lee; Hyunwoo Kim; Taigon Song (DATE, 2024)

FS2K: A Forksheet FET Technology Library and a Study of VLSI Prediction for 2nm and Beyond. - Yunjeong Shin; Daehyeok Park; Dohun Koh; Dongryul Heo; Jieun Park; Hyundong Lee; Jongbeom Kim; Hyunsoo Lee; Taigon Song (ISCAS, 2024)

Design Technology Co-Optimization and Time-Efficient Verification for Enhanced Pin Accessibility in the Post-3-nm Node. - Jaehoon Jeong; Yunjeong Shin; Hyundong Lee; JongHyun Ko; Jongbeom Kim; Taigon Song (IEEE Access, 2024)