A Winograd-Based CNN Accelerator with a Fine-Grained Regular Sparsity Pattern. - Tao Yang 031; Yunkun Liao; Jianping Shi; Yun Liang 001; Naifeng Jing; Li Jiang 002 (FPL, 2020)

Optimize the TX Architecture of RDMA NIC for Performance Isolation in the Cloud Environment. - Yunkun Liao; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (ACM Great Lakes Symposium on VLSI, 2023)

PHD: Parallel Huffman Decoder on FPGA for Extreme Performance and Energy Efficiency. - Yunkun Liao; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (DAC, 2024)

Athena: Add More Intelligence to RMT-Based Network Data Plane with Low-Bit Quantization. - Yunkun Liao; Hanyue Lin; Jingya Wu; Wenyan Lu; Huawei Li 001; Xiaowei Li 001; Guihai Yan (Euro-Par (2), 2024)

Efficient RNIC Cache Side-Channel Attack Detection Through DPU-Driven Architecture. - Yunkun Liao; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (Euro-Par (2), 2024)

DPU-Direct: Unleashing Remote Accelerators via Enhanced RDMA for Disaggregated Datacenters. - Yunkun Liao; Jingya Wu; Wenyan Lu; Xiaowei Li 001; Guihai Yan (IEEE Trans. Computers, 2024)

FUS: FPGA-based Universal Sketch with homogeneous and heterogeneous memory architectures. - Yunkun Liao; Jingya Wu; Wenyan Lu; Huawei Li 001; Xiaowei Li 001; Guihai Yan (CCF Trans. High Perform. Comput., 2025)