A Pipelined Architecture for Intra PU Encoding in HEVC. - Yunpyo Hong; Juwon Byun; Youngjo Kim; Jaeseok Kim (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014)

Implementation of an Quantum Circuit Simulator using Classical Bits. - Yunpyo Hong; Seokhun Jeon; Sihyeong Park; Byung-Soo Kim (AICAS, 2022)

Quantum Circuit Simulator based on FPGA. - Yunpyo Hong; Seokhun Jeon; Sihyeong Park; Byung-Soo Kim (ICTC, 2022)

Soft-Error Injection System for Processor on FPGA Platform. - Jeahack Lee; Hyeonseong Kim; Sihyeong Park; Yunpyo Hong; Seokhun Jeon; Byung-Soo Kim (ICUFN, 2023)

A Study on Concentric Feature Embeddings in Variational Multiclass Classification for Small-Scale Quantum Computers. - Seokhun Jeon; Yunpyo Hong; Byung-Soo Kim (QCE, 2023)