SuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs. - Yi-Hsiang Lai; Hongbo Rong; Size Zheng 001; Weihao Zhang; Xiuping Cui; Yunshan Jia; Jie Wang 022; Brendan Sullivan; Zhiru Zhang; Yun Liang 001; Youhui Zhang; Jason Cong; et al. (ICCAD, 2020)

SDCC: software-defined collective communication for distributed training. - Xin Jin 008; Zhen Zhang; Yunshan Jia; Yun Ma 002; Xuanzhe Liu (Sci. China Inf. Sci., 2024)

Aquifer: Transparent Microsecond-Scale Scheduling for vRAN Workloads. - Yunshan Jia; Yinmin Zhong; Meng Wang 018; Jiaqi Gao; Pengyu Zhang; Xuanzhe Liu; Xin Jin 008 (IEEE Trans. Serv. Comput., 2024)