Yuntao Liu

Orcid: 0000-0001-8213-582X

Affiliations:
  • University of Maryland, College Park, MD, USA


According to our database1, Yuntao Liu authored at least 25 papers between 2016 and 2024.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
Security Advantages and Challenges of 3D Heterogeneous Integration.
Computer, March, 2024

2023
Security-Aware Resource Binding to Enhance Logic Obfuscation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

Logic Locking based Trojans: A Friend Turns Foe.
CoRR, 2023

Low Power Logic Obfuscation Through System Level Clock Gating.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

TimingCamouflage+ Decamouflaged.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

2022
DynaMarks: Defending Against Deep Learning Model Extraction Using Dynamic Watermarking.
CoRR, 2022

A Combined Logical and Physical Attack on Logic Obfuscation.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

A Survey on Side-Channel-based Reverse Engineering Attacks on Deep Neural Networks.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021
Trace Logic Locking: Improving the Parametric Space of Logic Locking.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Evaluating the Security of Delay-Locked Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Robust and Attack Resilient Logic Locking with a High Application-Level Impact.
ACM J. Emerg. Technol. Comput. Syst., 2021

A Resource Binding Approach to Logic Obfuscation.
IACR Cryptol. ePrint Arch., 2021

Invited: Independent Verification and Validation of Security-Aware EDA Tools and IP.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Emerging Opportunities and Challenges in Hardware Security.
PhD thesis, 2020

Keynote: A Disquisition on Logic Locking.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Strong Anti-SAT: Secure and Effective Logic Locking.
IACR Cryptol. ePrint Arch., 2020

GANRED: GAN-based Reverse Engineering of DNNs via Cache Side-Channel.
IACR Cryptol. ePrint Arch., 2020

A Survey on Neural Trojans.
IACR Cryptol. ePrint Arch., 2020

2019
Mitigating Reverse Engineering Attacks on Deep Neural Networks.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

2018
A Combined Optimization-Theoretic and Side- Channel Approach for Attacking Strong Physical Unclonable Functions.
IEEE Trans. Very Large Scale Integr. Syst., 2018

TimingSAT: timing profile embedded SAT attack.
Proceedings of the International Conference on Computer-Aided Design, 2018

2017
Introducing TFUE: The trusted foundry and untrusted employee model in IC supply chain security.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Neural Trojans.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

2016
2.5D/3D Integration Technologies for Circuit Obfuscation.
Proceedings of the 17th International Workshop on Microprocessor and SOC Test and Verification, 2016

An optimization-theoretic approach for attacking physical unclonable functions.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016


  Loading...